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Design Of Autonomous Controllable Artificial Intelligence Processing Platform Based On Heterogeneous Intelligent Processing Platform

Posted on:2020-04-25Degree:MasterType:Thesis
Country:ChinaCandidate:W Q WuFull Text:PDF
GTID:2428330620951746Subject:Computer system architecture
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Artificial intelligence(AI),a technology that has already been bound up with people's lives,will generate greater commercial value to the modern society with the popularization and development of the Internet and the Internet of Things.During computers' computation of AI,due to the huge amount of data to be processed and the substantial progress in data processing algorithms,the traditional FPGA acceleration has run into difficulty fulfilling the computing needs that are increasing on a daily basis.Therefore,people begin to construct new computing architectures to beef up the performance of big data processing.In order to process AI computing faster,this paper first designed a Zhaoxin-FPGA AI processing platform,settled the communication problem between Zhaoxin CPU and multiple DE0-Nano-SoC development boards and designed and completed a floating point matrix multiplication system with Verilog.The whole AI processing platform can achieve floating point matrix to be calculated to multiple.In order to make better use of hardware resources and achieve higher performance in zhaoxin-FPGA,this paper designs a deep pipeline OpenCL core acceleration system framework,which can perform acceleration operations across different layers of the algorithm without re-programming the FPGA.This design mainly aims at parallel acceleration of convolution layer,pooling layer and normalization layer in YOLOv2 algorithm.To the best of our knowledge,this work is the first time to study the YOLOv2 algorithm acceleration system based on OpenCL for zhaoxin-FPGA.In order to compare with other design based on high-end FPGA,this paper carries out handwriting recognition experiments on Xilinx Zynq-7000 FPGA platform acceleration system and the acceleration system designed in this paper.The experimental data show that the acceleration scheme designed in this paper can only use 0.42 ms.Recognizing a handwritten image saves nearly a third of the time compared with the 0.67 ms acceleration scheme of Xilinx Zynq-7000 FPGA platform,and improves the resource utilization.Finally,we test several handwritten pictures and find that the speed of this design increases most obviously with the increase of tasks.Experiments show that the artificial intelligence processing platform designed in this paper has a good acceleration effect and achieves the design goal.
Keywords/Search Tags:Artificial intelligence, Zhaoxin-FPGA, Y0L0v2 network, OpenCL
PDF Full Text Request
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