Research And Verification Of Blind Source Separation Algorithm For Co-frequency Digital Communication Signals Based On FPGA

The rapid development of mobile communication technology has brought great challenges to the efficient use of limited spectrum resources.In order to fully utilize spectrum resources,the interference problem of spectrum aliasing of telecommunication signals is often introduced.The blind source separation BSS technology requires little prior information and does not occupy additional telecommunication resources such as spectrum,power and time slot,making it a preferred solution to the problem of spectrum aliasing.FPGA is suitable for scenarios which need parallel high-speed processing,so it can be used as a hardware platform for BSS research and verification.This thesis introduces the system model of blind source separation,and studies Independent Component Analysis which is the core technology of blind source separation based on signal independence,and focuses on the fast fixed point iteration algorithm FastICA which is based on negative entropy,its zero-mean and whitening preprocessing module,the iteration module and orthogonalization module used to solve multiple independent components are analyzed,and the criteria for judging the separation performance are introduced.The key modules for implementing digital downconversion DDC are discussed.The FastICA algorithm is combined with DDC to form a complete receiving system for separating and downconvering spectral aliasing digital communication signal.For the linear instantaneous aliasing scenario,two 16 QAM modulated signals with the same frequency and the same bandwidth are generated and aliased in MATLAB as the input of the whole system.Then the MATLAB code for FastICA and DDC are implemented and the MATLAB simulation and analysis of the overall system are performed.After the verification in MATLAB,Verilog code for FastICA module and DDC module is implemented in Vivado and the functional simulation is executed.Finally,the bitstream corresponding to the circuit is downloaded to the FPGA chip of Xilinx VC707 board,completing board-level debugging and verification of the whole system.In this thesis,the blind source separation algorithm FastICA is implemented to solve the problem of spectrum aliasing of the same frequency digital communication signal.Its convergence precision can reach 0.9997.The performance index PI which indicates the difference between the global transmission matrix and the arrangement matrix is less than 0.01,which shows a good separation performance.The number of iterations is generally less than 10 times,indicating that the convergence speed is fast.This thesis has practical significance for enhancing the anti-interference ability of telecommunication system.