Research And Circuit Design Of Echo Suppression Technology For DMB Co-channel Repeater

DMB(Digital Multimedia Broadcasting)Co-channel repeater,as a wireless repeater signal amplifier,can extend the coverage of DMB signals and reduce dead zones.However,due to the characteristics of the same frequency forwarding,there is a return coupling between the transmitting and receiving antennas of the repeater.The coupled echo is re-amplified by the repeater donor antenna,forming a positive feedback inside and causing the system to become unstable,and even self-excited.The above engineering issues are studied in this thesis,and the aim of this thesis is to design a co-channel repeater echo suppression circuit which is suitable for DMB system to improve the working stability of co-channel repeater through the research of adaptive filtering algorithm.Firstly,the thesis investigate the structural characteristics and working principles of the DMB system,as well as the principle of self-excitation generation and echo suppression methods of the repeater.On this basis,the research compares and analyzes the principles,performance and hardware complexity of adaptive algorithms such as LMS,NLMS,and RLS.According to the characteristics and application requirements of the DMB system,the LMS algorithm is used as the core echo suppression algorithm.The LMS algorithm for the echo suppression of repeater is analyzed,and the simulation and analysis are completed on the MATLAB platform.Secondly,the echo suppression circuit system scheme of DMB co-channel repeater is designed,including DMB RF receiver module,LMS adaptive echo suppression module,IQ mixing and low-pass filtering module,up-converter module etc.The LMS adaptive echo suppression module,IQ mixing and low-pass filtering module are developed based on the FPGA platform,and each module is simulated by Modelsim,and key signals are collected and analyzed using Signal Tap II tools.Using PADS software complete the circuit diagram and PCB design of the DMB RF receiver module and AD9957 up-converter module,and made a prototype.Finally,using the laboratory DMB transmission system to verify the function of DMB RF receiver module and AD9957 up-converter module,as well as the algorithm modules designed in this thesis is downloaded into the FPGA chip for board-level verification.The results show that:(1)The DMB RF receiver module can stably output DMB digital intermediate frequency signal with a parallel 8-bit center frequency of 2.048 MHz and theAD9957 up-converter module can up-convert the baseband signal to the III band,IQ mixing and low-pass filtering module can stably output DMB baseband IQ signal,which meets the design requirements;(2)The LMS adaptive echo suppression module can effectively suppress the echoes,after echo suppression,the signal is highly correlated with the original DMB signal,which better restores the characteristics of the original DMB signal,and the square error between the suppressed signal and the original DMB signal is stable around-5d B,and the hardware processing delay meets the design requirements.