Design And Implementation Of Single-bus Digital Temperature Sensor

The core components of the digital temperature sensor are analog temperature sensing circuit,analog-to-digital converter and serial bus interface.?-? ADC(Sigma-Delta Analog Digital Converter)is often used as an analog-to-digital converter in low-speed and high-precision applications.In this paper,?-? ADC is selected as the analog-to-digital converter in digital temperature sensors.The single bus protocol interface only needs one line to communicate with the outside,which can save PAD resources and is easy to implement and maintain.In this paper,the single bus protocol is finally used to implement the serial interface.Generally speaking,the performance and speed of the ?-? ADC depends on the modulator,and the area and power consumption are determined by the digital decimation filter.Therefore,reducing the power consumption and area of the digital decimation filter plays a key role in reducing the area and power consumption of the digital temperature sensor chip.This paper mainly studies the digital circuit in the digital temperature sensor,so the purpose of this article is to design a low-power small-area digital decimation filter system and a single bus slave interface.According to the characteristics of low frequency of temperature signal,there is no need to update the temperature data in real time,so the ?-? ADC is controlled to perform a single or 1 SPS(Sampers Per Second)conversion to shorten the working time of the ADC,so as to achieve the purpose of reducing power consumption.The digital filter system in this paper only uses CIC(Cascaded Integrator Comb)filter,which can not only reduce the design complexity of the filter system but also meet the required design accuracy.In addition,the decimation factor of the designed digital decimation filter system is adjustable,which can not only meet the requirements of high precision,but also produce lower power consumption in low-precision applications.At the same time,in order to further realize the design concept of low power consumption and small area,a multi-stage cascaded non-recursive CIC filter architecture is adopted.At each stage of the CIC filter,polyphase decomposition,delay cell sharing,and coefficient sharing techniques are used.By using clocks of different phases to control the data transmission of each channel of polyphase decomposition,the generation of polyphase decomposition control logic circuits is avoided.The technology of combining synchronous and asynchronous frequency dividing is used to generate the clock frequency dividing circuit,which reduces the complexity of the frequency dividing circuit.a combination of Booth and iteration is used to implement the multiplier,which reduces the time for error calibration and reduces resource consumption.After confirming the architecture of the CIC filter and the function of the single bus protocol interface,RTL-level coding is performed on the digital circuit of the digital temperature sensor,and then ISE and Modelsim are used to complete the functional simulation verification.Based on the CMOS 180 nm process,the physical implementation of the digital circuit of the digital temperature sensor is completed.In physical implementation,gating technology is used to further reduce the power consumption of the chip.The final area of the digital temperature sensor digital circuit is 1275×986?m2,and the power consumption is 754.4?W.Compared with the recursive structure of the CIC filter and the traditional non-recursive structure,the digital circuit designed in this paper produces lower power consumption.The disadvantage is that the area of the digital circuit has increased slightly.