| At present,due to the rapid development of wireless communication technology,the phased array radar(PAR)system,which has high performances such as high precision,multi-channel,big data and anti-interference in various complex environments,is highly required.A phased array antenna consists of a large number of small antenna elements arranged in an array,each antenna unit is controlled by an independent phase shift switch.By controlling the phase of each antenna element,the PAR can form different phase beams,and each controlling-element is a T/R(Transmit/Receive)module.Therefore,as the key circuit of the T/R module,it is particularly important to study the ultra-wideband phase shifter and attenuator that can work simultaneously in multiple frequency bands.Based on the SMIC 40nm CMOS process,the ultra-wideband CMOS six-bit phase shifter and attenuator are designed in this thesis.The main work of the paper is as follows:(1)The performance of MOS switches,the key components of the attenuator and phase shifter,is analyzed in detail.The connection mode,size,bias voltage and inherent phase error of the MOS switch are analyzed in detail in this paper,and the optimization of MOS switeches is proposed to minimize the influence of the parasitic effect of the MOS switch in circuit.(2)A 6-bit phase shifter working in 14?20GHz ultra-wideband is studied and designed.By analyzing the advantages and disadvantages of different types of phase shifters and the scope of application,and then combined with simulation analysis for comparison,the appropriate type for circuit design is selected.11.25 degree,22.5 degree,45 degree and 90 degree phase shift unit adopt bridge T-type phase shift structure,which has the advantages of small occupied area and low insertion loss;The 5.625degree phase shift unit cannot be designed with a bridge T-type structure due to the need for extremely large inductance and extremely small capacitance.A small phase shift with simpler topology,smaller size,and low insertion loss is proposed.For the 180degree large phase shift circuit,two 90 degree phase shift units are cascaded.Then through the bit-by-bit iterative simulation comparison method,the cascading mode of the 6 basic units of the phase shifter is determined.Finally,the layout design and simulation are carried out.The chip area is 3.26×0.76mm~2,the maximum phase shift is355.78 degree,and the flatness is good.The insertion loss is less than 10.65d B.The post-simulation phase shift error is less than 3 degree.The overall performance of the phase shifter is good,which meets the design requirements.(3)Two 6-bit attenuators were designed to work in 11.1?31GHz and 30?50GHz bandwidths respectively.Through simulation comparison with other structure types,the bridge T-shaped structure is selected for the design of small attenuation bits of 0.5d B,1d B,2d B and 4d B,and the?-shape structure is selected for the design of large attenuation bits of 8d B and 16d B.A bit-by-bit iterative method of simulation comparison is used to determine the cascading mode of the six basic units of the attenuator.Finally,the layout design and simulation are chieved.1)When the operating bandwidth is 11.1?31GHz,the maximum attenuation is31.48d B,the insertion loss is less than 2.84d B,the input and output return loss are less than-10d B,and the isolation is good.2)When the operating bandwidth is 30?50GHz,the maximum attenuation is31.36d B,the insertion loss is less than 4.38d B,the input and output return loss are less than-10d B,and the isolation is good.The chip area of the two designed attenuators is 0.14×0.07mm~2.The two six-bit attenuators are designed to meet the requirements of ultra-wideband,low insertion loss,small attenuation error,and good circuit performance. |
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