Study And Design Of High Linearity Rf Front-End For Wideband Multimode Transmitter

With the rapid development and wide application of wireless communication technology,modern wireless communication systems have multiple communication standards in different frequency bands and different systems.In order to improve the convenience of wireless communication equipment,the demand for wideband multimode RF transceivers is increasing.In addition,due to the increasing requirements for data transmission rates in daily applications,new communication technologies have adopted larger bandwidths and more complex modulation technologies,and the performance requirements for wideband multimode transceiver chips have became higher and higher.As the chip output stage of a wideband multi-mode transmitter,the RF front-end plays a decisive role in the frequency coverage,linearity and cost of the transmitter chip.Based on the 0.13?m CMOS process,a high linearity RF front-end for a wideband multimode transmitter is studied in this thesis.The main work is as follows:(1)The existing transmitter architectures are analyzed and compared,the direct conversion architecture is adopted as the multimode transmitter architecture,and the key performance indicators of the transmitter are analyzed.Based on the existing wideband multimode transmitter chip solutions,in the view of the adaptability and cost,a multimode transmitter solution for analog baseband multiplexing and wideband coverage using multiple RF paths with on-chip passive BALUN is proposed.(2)The nonlinearity and corresponding linear improvement methods of MOS devices are analyzed.The nonlinear generation mechanism of different transmitter RF front-end architectures is studied.A differential high linearity current-mode transmitter RF front-end architecture is proposed.a differential voltage-to-current converter is used,which requires almost zero driving capability of the previous circuit,and the signal is transmitted to the power mixer in the form of cascode current mirrors.Furthermore it can improve the linearity of the transmitted signal.(3)In order to enhance the integration of the wideband multimode transmitter system,the on-chip BALUN implemented in the standard CMOS process is studied.An on-chip passive BALUN design method based on a script program to automatically generate layout is proposed,which greatly improves the efficiency of designing passive baluns.The effects of various design parameters on the performance of the BALUN are analyzed by simulation,and the optimal design rules of the on-chip passive BALUN are summarized.Finally,three on-chip passive baluns were designed which can meet the performance requirements of different frequency bands.The post-layout simulation results show that the wideband high linearity transmitter RF front-end consumes 158 m W of power and has a frequency coverage of 0.7-2.7GHz,which can meet the requirements of most existing communication standards.The 1d B compression point of the output power is 11.9d Bm,the third-order intercept output point reaches 25 d Bm,and the third-order intermodulation achieves below-70.5d Bc,which has better linear performance than the published papers.