Implementing Real-time SAR Imaging On Multi-Processors System On Chips

SAR(Synthetic Aperture Radar)imaging technology is a widely used and mature radar imaging technology.Airborne and space-borne SAR have been widely used in military and related scientific research,ground condition monitoring,Ground Moving Target Indication(GMTI).SAR has appeared in many fields,such as disaster monitoring.The SAR imaging algorithms are becoming more and more perfect,and the imaging quality can almost reach the same level as the optical image.However,the data volume of SAR imaging processing is large and the computing process is complex,the traditional processing system is difficult to meet the real-time requirements of SAR data processing.With the development of VLSI,the single chip has enough resources to integrate multiple processing cores,which makes the multiprocessor system on chip develop rapidly.On-chip multiprocessor systems speed up the computing process in parallel by multiple isomorphism or heterogeneous processing cores.At the same time,the multiprocessor system can realize different algorithms by controlling the data flow,so it has better flexibility.Therefore,aiming at the real-time requirement of SAR imaging,this paper designs and develops a multi-processor system architecture suitable for heterogeneous chip,and speeds up the process of SAR imaging by multi-core parallel computing.Firstly,this paper analyzes the computational complexity and communication requirements of the most widely used range Doppler algorithm and frequency modulation scaling algorithm.By analyzing the characteristics of SAR imaging algorithm,it is found that the data processing of each part of the algorithm has a high degree of consistency,and the processing steps of the data have strict order and the possibility of parallel computation.In this paper,a multiprocessor system architecture on heterogeneous chip is proposed for SAR imaging.The FFT/IFFT,phase multiplication processing,which takes the most time in the imaging process,is realized by special processing unit,which is pipe-lined and parallelized.In order to accelerate the imaging process.Secondly,this paper proposes that the main control core can monitor and control the whole imaging process by controlling the data flow direction and calculating the core state.By controlling the flow direction of the data,the main control core makes the whole system have strong expansibility,and the control of the computing core state makes the computing unit reduce the idle state time and improve the calculation efficiency in the process of processing the data.Finally,the FFT/IFFT,which is the most computationally expensive step in SAR imaging process,is designed and the pipeline fixed-point FFT is used to accelerate thecalculation process.The multiprocessor system uses the on-chip network structure to transmit data between cores,and realizes the data matrix transpose by DMA mode,which reduces the transposing time.The experimental results show that SAR imaging is realized by using the structure designed in this paper,which improves the imaging speed,enhances the ability of inter-core communication,improves the flexibility of the system,and reduces the difficulty of development.Within the range of error,the fixed point FFT can save the resource on the chip and improve the speed of calculation,and solve the problem of matrix transpose in the processing of SAR azimuth data.