Design Of High Efficiency And Low Ripple Buck DC-DC Chip

With the construction of national strong smart grid,the demand for smart meter products is growing.In order to develop green electronic technology,power management chip suitable for smart meter or other communication carrier module is particularly important.High efficiency and high precision DC-DC converter chip is an important member of power management chip.In order to better meet the market demand of smart meters,this paper tests and analyzes the internal circuit of smart meters,and extracts the important basic parameters.Then,based on 0.18 ? m CMOS technology,a buck DC-DC converter with high efficiency and low ripple is designed for smart meters.The circuit is integrated with a linear regulator circuit,which can improve the stability of the circuit.The synchronous rectifier technology is used to improve the conversion efficiency.The loop compensation is also carried out for the overall circuit,so that the overall circuit has a good dynamic response to reduce the ripple.Based on Cadence Spectre simulator,the designed circuit is simulated and analyzed.The simulation results show that when the input is 8V ? 24 V and 5V ? 24 V,5V and 3.3V voltage can be output respectively,the maximum output current is600 m A,the output voltage ripple rate is less than 0.45 ‰,and the maximum converter efficiency is 90.57%.The simulation results show the correctness of the designed circuit.Finally,the layout of the chip is designed and verified by DRC and LVS.