Design Of A K-band 6bit MMIC Digital Phase Shifter And Attenuator

As a kind of amplitude and phase control device,phase shifters and attenuators play a very important role in microwave circuits,especially in the transceiver modules of phased array radar and mobile communication systems.Phase shifters and attenuators usually appear simultaneously for spatial scanning.With the continuous development of monolithic microwave integrated circuits,there is an increasing demand for microwave devices with small size,light weight,high reliability,and high production repeatability.A chip is designed in this thesis,that integrates phase shifting function and attenuation function based on monolithic microwave integrated circuit technology.The chip contains a 6-bit digital phase shifter and a 6-bit digital attenuator.The design requirements of the chip are that the insertion loss is less than 17 d B,the input-output standing wave ratio is less than 2,the phase shift root mean square error of the phase shifter is less than 5°,and the attenuation root mean square error of the attenuator is less than 0.6 d B.In this thesis,a K-band six-bit digital phase shifter and attenuator is studied.Based on the 0.25μm Ga As p HEMT process,a design method of phase shifter and attenuator is proposed.The working principle of the phase shifter and the attenuator and the common circuit topology are introduced,as well as the advantages and disadvantages of different structures.The switching characteristics of the active device p HEMT in the circuit were analyzed,and its influence on the circuit performance was analyzed.The various passive device models used in the circuit were analyzed.The 5.625° phase shifting unit adopts a parallel inductor structure,and the 11.25°,22.5°,and 45° phase shifting units adopt a full-pass structure,the 90° and 180° phase shifting units adopt a high-pass low-pass structure,and the attenuators adopt a T-type attenuation network cascade design.Continuously iteratively optimize circuit component parameters until single-stage circuit performance meets design specifications.Then,each single-stage circuit is cascaded,S-parameter analysis of complete circuits under different cascaded sequences,the problem of cascading order and inter-stage matching is solved,and a balance is made between the performance indexes of the phase shifter and attenuator to optimize the overall performance.In the ADS,the layout design of the phase shifter and the attenuator is completed,and the electromagnetic field simulation of the layout is performed,and the layout optimization is completed through the simulation result analysis.The final layout area is 6.5mm × 1.1mm.The electromagnetic field simulation results show that the insertion loss of 64 phase shifting states and attenuation reference states is less than 16.3d B at 28-32 GHz,and the input-output standing wave ratio of 64 phase shifting states and 64 kinds of attenuation states are less than 1.87.The phase-mean-square root error is 3.25°,and the attenuation root mean square error is 0.27 d B.The 64-state insertion loss fluctuates between ±1.52 d B and the 64-state attenuation has an additional phase shift of ±24.2°.