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The Research And Design Of High Efficiency CMOS Envelope Tracking Technology

Posted on:2018-12-02Degree:MasterType:Thesis
Country:ChinaCandidate:H ZhangFull Text:PDF
GTID:2348330512489230Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
With the development of communication technology,wireless communication equipment will be more and more complex.Using energy at a high efficiency not only extends the useful life of batteries,but also greatly reduces the heat dissipation of electronic equipment,and further improves equipment reliability.At present,the envelope tracking technology has become a hot topic both at home and abroad because of its simple circuit structure,easy integration and improving efficiency of system.In this paper,the envelope tracking technology has been studied in detail,and several kinds new structures for efficiency has been proposed,these structures have a very important significance for improving the efficiency of the circuit system.First of all,several structures of the envelope amplifier would be introduced,and its advantages and drawbacks would be evaluated respectively.Then we analyze the power consumption of each part of the envelope amplifier to provide a thought on the method of improving efficiency,which would be discussed in the following part.Firstly,we use 0.18 um process to design a chip based on the classical envelope amplifier structure.The linear stage is a two-stage amplifier,mainly be used to provide high-frequency current and to eliminate the ripple current when the switch is toggled;the switching stage is a step-down DC-DC converter which provides most of the current(low frequency current)of the load operation to improve efficiency.The final layout area is 0.8mm×0.5mm.Under the condition when the power supply voltage is 3.3V,10 MHz LTE signal,load 8 ohms,the final output power is 27 dBm,and the overall efficiency is 74%.However,the efficiency still has a spacious room to be improved.Therefore,the next focus of the present work is the method by which we could achieve higher efficiency.We then present three approaches which could help to realize this goal.The first method is using a rail-to-rail amplifier to amplify the difference to make the control circuit more "punctual",so that the switch could be turned on and off more timely,and efficiency consequently increases by 2 percentage(76%),with no increase of layout area.Also,we find that when the gate voltage of output stage amplifier NMOS transistor of the linear stage is greater than a threshold voltage,the linear stage begins to absorb the ripple current.Therefore,the second method is that we store these ripple current in a capacitor,and eventually increase the efficiency by 2.3 percentage(76.3%).The third method is more radical.When the output power of the power amplifier is below a certain value,the linear and switching stages stop working and a DC current starts supplying current,while when the output power is relatively high,all circuit modules are involved in working.This approach is likely to greatly improve the efficiency of the entire system,and finally the initial simulation efficiency is more than 87%.
Keywords/Search Tags:CMOS process, envelope tracking technology, hybrid envelope amplifier, efficiency
PDF Full Text Request
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