Research And Verification On Key Techniques Of CCFD RF Self-interference Rejection Chip

Co-time Co-frequency Full Duplex(CCFD)has become more and more popular to solve the contradiction between the increasing wireless communication requirements and limited spectrum resources.CCFD performs two-way communication in the same frequency during the same time period.Compared with the traditional duplex mode,CCFD can theoretically increase the spectrum efficiency by up to double,with a wide application prospect.However,only effective self-interference rejection can ensure the normal operation of the CCFD system.At present,the self-interference rejection technology mainly consists of airspace,analog domain and digital domain self-interference rejection.Among them,the self-interference rejection in the analog domain is comprised of large number of modules which makes the device bulky,so miniaturization is its development trend.Aiming at realizing the RF self-interference rejection in analog domain,this paper studied and verified its chip-based key technology from the following aspects:Firstly,the demand analysis of the RF self-interference rejection chip was made to determine the rejection scheme.According to function analysis of the chip applied in interphone scenario,the effects of delay,phase and amplitude on the self-interference rejection were studied in the 409MHz frequency band to determine the functional requirements of the chip for adjustable delay,controllable attenuation and controllable phase shift,which provided theoretical support for chip design.Then important RF indicators of the chip were theoretically analyzed to provide a reference for determining the indicators of each unit of the chip.Secondly,according to the functional requirements of the chip,each functional unit of the chip was designed and simulated.The structural design was carried out for each functional unit of the chip,including the power dividing unit of the resistor and the capacitance structure,the T-type controllable attenuation unit composed of MOS,the adjustable delay unit realized by all-pass filter,the phase-shifting unit realized by vector synthesis,the amplifier unit with common source and differential input and so on.Then the TSMC process library was applied to the layout drawing and simulation of each unit,and the simulation results were compared with the design objectives.Thirdly,the verification platform was designed according to the application scenario to verify the functions of each unit of the chip.A power-supply-and-off module for each unit was designed to verify the function of each unit of the chip;the control signal was set according to the chip design.Finally,the function and index test of each unit of the chip were conducted,and the analysis and summary were performed according to the test result.It has theoretical and practical significance to design and verify the CCFD RF self-interference rejection chip,which could also provide important reference for further research.