Investigation On Novel Device Structure And Optimization Design Of Tunneling Field Effect Transistor

As the size of MOSFETs continues to decrease,the integration of the chip continues to increase and the switching speed continues to increase.At the same time,the size of MOSFET is decreasing,requiring the supply voltage and threshold voltage to decrease.Since the subthreshold swing of the MOSFET has a theoretical limit of 60mV/decade,when the size of MOSFET reduces to the nanometer level,it will have a higher off-state current,which in turn produces large static power consumption.Compared to MOSFETs,tunneling field effect transistors(TFETs)can achieve subthreshold swings below 60mV/decade due to the band to band tunneling mechanism as the device's operating mechanism,thus having a lower off-state current,which is potential to be applied to ultra low power integrated circuits.However,conventional tunneling field effect transistors are also faced with two major challenges of having the ambipolar current and the low on-state current.Taking an N-type tunneling field effect transistor as an example,under positive gate voltage conditions,band to band tunneling mainly occurs between the source region and the channel region.When a negative gate voltage is applied,the band to band tunneling can also occur between the drain region and the channel region.At this time,the tunneling current is called as the ambipolar current.The ambipolar current is undesirable for circuit design.In addition,compared with the drift diffusion mechanism of the conventional MOSFET,the band to band tunneling efficiency is low,so the tunneling field effect transistor has a low on-state current.In view of the two problems of the ambipolar current and the low on-state current of the tunneling field effect transistor,this paper optimizes the traditional tunneling field effect transistor and proposes new device structures.On the one hand,in order to solve the problem of ambipolar current in the tunneling field effect transistor,a novel step shaped gate structure tunneling field effect transistor(SSG-TFET)is proposed.By using a step shaped gate structure to adjust the potential and the energy band near the interface between the channel region and the drain region,the energy band near the interface between the channel region and the drain region is slowed,and the tunneling distance becomes large,thereby suppressing the ambipolar current.In this paper,compared with the traditional double-gate tunneling field-effect transistor and two existing devices suppressing ambipolar current,the comparison results show that the SSG-TFET device structure obviously suppresses the ambipolar current and has excellent suppression effect.The physical mechanism of SSG-TFET to suppress ambipolar current is also analyzed.In addition,the influence of gate structure parameters on the suppression of ambipolar current is studied.The results show that there exists the optimal thickness of the oxide layer in the drain region minimizes the ambipolar current.Further,the influence of structural parameters on the optimal layer thickness is discussed.On the other hand,for the problem that the on-state current of the tunneling field effect transistor is relatively small,a novel line tunneling field effect transistor(RT-TFET)with inverted T-gate structure is proposed.The RT-TFET utilizes the principle of line tunneling.The inverted T-gate and the left and right source regions can significantly increase the area of the tunneling region,thereby obtaining a larger on-state current.The simulation results show that compared with the traditional TFET,the on-state current of the RT-TFET increases by three orders of magnitude and has an ideal subthreshold swing.Finally,the influence of device structure parameters and doping concentration on the performance of RT-TFET is also studied,which provides guidance for the optimal design of RT-TFET.In general,this paper aims at the TFET's problem of ambipolar current and small on-state current.The TFET is optimized and new device structures is proposed to improve the performance of the device.