FPGA Implementation Of Convolutional Neural Network Demodulators

Ultra-narrow Band(UNB)technology can efficiently use the scarce spectrum resources,and the key to achieve high spectrum efficiency lies in the demodulator design strategy.In recent years,demodulator based on the deep learning convolution neural network(CNN),even in the presence of serious ISI,experimental simulation still achieved good performance.However,most of the research at present mainly focuses on exploring the influence of different network topology on the demodulation performance through experimental simulations,and seldom considers the actual performance and demodulation speed of the network on the hardware.In view of this,in order to quickly deploy the trained network to a given FPGA hardware platform to evaluate hardware demodulation performance and speed,this paper innovatively builds a complete tool chain that can quickly transplant a given network topology CNN for MPPSK demodulator to the FPGA platform under the limited network size.At the same time,it explores the influence of different network topologies,calculation precision,activation function and data preprocessing on demodulation performance and hardware acceleration,and seeks to strike an optimal balance between the speed and the performance in demodulation,at the same time,giving some guidance and hints on how to construct a efficient network structure for demodulator decision.This article can be divided into two main parts:The first part first briefly introduces the EBPSK modulation and its power spectrum.The MPPSK modulations are introduced in detail later.Then the modulated signals time-frequency characteristics and the influence of modulation parameters on the signal power spectrum are analyzed in detail.Finally the transmission model for MPPSK signal is introduced.The second part mainly introduces the construction process of the tool-chain for quickly deploying the trained CNN to FPGA.The key point of this paper is to study and set up an implementation framework so that the model iterative test can be carried out quickly when the network structure and training data is given.After a desired model has been trained,it can be quickly transplanted to the corresponding FPGA platform.In order to realize the universality of the framework,we draw on the layered design idea of Caffe,and implement the FPGA support for each layer of CNN by means of template class in C++ using Vivado HLS tools,thus building a synthesizable CNN layer library.A CNN training tool for MPPSK demodulator decision is constructed based on Keras,and different training data and network topologies,activation function and convolution kernel size on demodulation performance and speed are explored.Finally,the detailed implementation process of transplanting a well-trained network to FPGA is introduced and the hardware demodulation performance and speed are evaluated.