An Analog Front-end Circuit Design For Pressure Sensors

With the development of semiconductor technology,piezoresistive pressure sensors have been widely used due to small size,light weight and high sensitivity.Piezoresistive pressure sensors usually require less static power consumption in low-power applications,so the resistance of the resistors in the sensor is generally large,resulting in the small output electrical signal caused by pressure,so the output signal needs to be amplified and converted by an Analog Front-End(AFE)firstly.and then it can be processed by subsequent system.This thesis introduced the AFE for a piezoresistive pressure sensor based on the0.18?m CMOS technology.First of all,This thesis determined the circuit frame of the AFE based on the output characteristics of the piezoresistive pressure sensors applied to the touch screen.A dual-channel structure is adopted to reduce power consumption and area,and each channel adopts programmable operational amplifier(PGA)and successive approximation analog-to-digital converter(SAR ADC)to achieve the amplification and quantization of different amplitude signals.The working sequence of the AFE is introduced in this paper.Then,the design of the SAR ADC used in the AFE is described in detail.The core module includes DAC,comparator,pre-amplifier,and common-mode voltage generating circuit.A RC-capable DAC is employed to achieve the trade-off between area and performance,and the working principle and non-ideal factors of the DAC is analyzed in detail.The mismatch of the comparator is introduced and a static comparator with low offset voltage is used in this thesis.the offset calibration technology of the design is determined by analyzing and comparing the common offset calibration technology,and a high gain fully differential amplifier is designed according to the requirements of the offset calibration.the common-mode voltage generating circuit is composed of a resistor divider circuit and a high gain operational amplifier with unity-gain negative feedback structure,and the structure of the operational amplifier is introduced in detail.Finally,this paper has the layout simulation of the ADC and AFE.The simulation result shows that when the sampling frequency is 116kHz,the input frequency is 57kHz,the power supply voltage is 2.8V,the ENOB of the ADC is 9.99 bits under the TT process corner,the SNDR is 61.9dB,and the SFDR is 75.57dB.The total area of AFE is about 0.88 mm~2,the total current of the circuit is about 2.19 mA in normal operation,and the AFE can amplify and convert weak signals.