Research On Miss-aware LLC Buffer Management Strategy Based On Heterogeneous Multi-core

With the development of multi-core processors,traditional multi-core architectures are difficult to meet the needs of large-scale computing.The industry forms heterogeneous processor architectures by integrating different types of processors on the same chip.After years of continuous research and development,advanced architectures such as multi-core processors have gradually replaced single-core processors and become the most important way to improve processor performance.The Graphics Processing Unit(GPU),also known as graphics processor core,is a microprocessor that specializes in image operations.CPU is superior to the GPU in processing numerical calculation tasks.However GPU has simpler control logic than the CPU and integrates a large number of parallel processing cores with high peak performance.The CPU core and the GPU core possess have different and identical functions and structures.The researchers integrate the two types of cores on the same chip in an effective manner,forming a CPU-GPU architecture.Different feature type applications are allocated to different cores for parallel processing,thereby improving the performance of the microprocessor system.The CPU-GPU architecture poses new challenges for resource sharing between the CPU and the GPU,especially the Last Level Cache(LLC)sharing.Since the GPU has a large number of concurrent threads and high latency tolerant access,the shared LLC will be dominated by thousands of memory accesses from GPU application threads.A large amount of LLC space will be occupied by GPU applications.The LLC space for the CPU is extremely limited.As a result,the accesses of CPU applications to LLC reduce significantly.Aiming at the above situation,in order to improve the utilization efficiency of shared LLC under heterogeneous multi-core architecture and improve system performance,this paper analyzes the access behavior of CPU and GPU,and proposes an LLC buffer management strategy based on heterogeneous multi-core which called Buffer-for-GPU(BFG).This strategy establishes a buffer with the same structure as the LLC,aiming at separating CPU and GPU requests.Cache-insensitive GPU messages directly access Buffer without accessing LLC,thus filtering GPU stream requests,freeing up the LLC space for CPU applications.Taking into account the multi-core architecture,GPU applications may exhibit different behavioral characteristics.Based on the BFG strategy,a miss-aware LLC buffer management strategy based on heterogeneous multi-core called Miss-Aware Buffer-for-GPU(MBFG)policy is proposed.The miss-aware cache replacement strategy is applied to the buffer.System chooses different replacement strategies for the current running state dynamically according to the comparison of buffer miss rate in the time interval.At the same time,the performance of GPU has been improved and the performance of the whole system has been improved.In order to accurately evaluate the impact of the experimental scheme on system performance,the experiment in this paper uses the Gem5-GPU simulator as the basic simulation platform,and uses the SPEC CPU 2006 and Rodinia test suite as a benchmark program for experimental verification.Experimental results show that the architecture of the LLC buffer management strategy based on heterogeneous multi-core can increase performance of CPU applications by 2.48% on average compared to the traditional heterogeneous multi-core architecture,and reaches a maximum of 3.80%;GPU application performance improves by an average of 9.30% and a maximum of 11.63%.The CPU application LLC hit rate increased by an average of 70.45%.The architecture of the miss-aware LLC buffer management strategy based on heterogeneous multi-core compared to traditional heterogeneous multi-core architecture,GPU application performance increased up to 13.52%.Therefore,the LLC buffer management strategy based on heterogeneous multi-core and the miss-aware LLC buffer management strategy based on heterogeneous multi-core proposed in this paper have greatly improved the performance of heterogeneous multi-core systems.