SEU Radiation Hardened By Design Technique For Lossless JPEG-LS Image Compressor

With the development of aerospace industry,the amount of image data information is increasing.Image compressor is becoming more and more important in the application of space image processing.Image compressor needs to be executed in accordance with certain standards,JPEG-LS(Joint Photographic Experts GroupLossless)is a mainstream image lossless/near lossless comp ression standard.It not only has good compression effect,but also has the characteristics of low computational complexity,saving hardware resources and being more suitable for use in aerospace equipment.There are a large number of radiation particles in the space environment.The image compressor working in the space environment suffers from Single Event Upset(SEU),which eventually leads to the whole image data compression error and cannot recover the original image.Therefore,it is necessary to design radiation hardened image compressor to reduce the distortion of the image.In this paper,firstly,the basic theory of image compression is introduced.After that,the JPEG-LS standard is analyzed,and the process of lossless compression is studied in details,based on which,the hardware structure of JPEG-LS lossless compressor is designed.The following optimization schemes are proposed: the function of choosing regular mode or run mode is implemented by using Finite State Machine(FSM);Simple shift register is used to complete the task of code stream splicing and save hardware resources;The input controller is designed to cooperate with the encoder,and the pipeline technology is used to process the regular mode encoder,which improves the compression efficiency.Finally,the encoder can compress 512×512 8 bit gray image correctly.Considering the speed,area overhead and the structure characteristics of the encoder,the harden methods are proposed from the following aspects: Using One-Hot and three mode redundancy(TMR)to harden mode selector;Hardening core encoders with TMR and timeout detection techniques;Hardening the parameter update module with EDAC;Compression independently to reduce SEU accumulation.Simulation results shows that the encoder function and hardening methods proposed in this paper are correct and effective.The hardening methods is assessed by Fault Injection Tool.The result shows that the overall error rate of the hardened compressor is reduced by 19.48%.Finally,the design is implemented by using Xilinx's FPGA,which verifies the correctness of the compressor.