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CNN Based HEVC Intra PU Encoding Algorithm Optimization And The Hardwired Implementation Of CNN

Posted on:2019-08-22Degree:MasterType:Thesis
Country:ChinaCandidate:N SongFull Text:PDF
GTID:2428330590951640Subject:Integrated circuit engineering
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High Efficiency Video Coding(HEVC),the newest video coding protocol,was proposed in April 2013.As compared with the previous generation standard H.264,HEVC reduced 50% bit-rate with the same subjective picture quality.To improve the accuracy of signal prediction,HEVC introduced many innovative technologies.For intra coding,HEVC brought in a new set of units for the splitting of pictures,which introduced coding unit(CU),prediction unit(PU)and transform unit(TU).Those units made the partition of picture more flexible and precise.Besides,in order to improve the accuracy,the number of PU prediction modes adopted by HEVC had increased up to 35 for the intra PU mode decision.However,both the precise prediction and the high compression rate were the cost of computational complexity.The computational complexity of HEVC was about 4 times than H.264,which was one of the important reasons limited its spreading.In our work,we bring in the CNN to obtain the candidate modes of current PU and adopt the corner detection algorithm to further reduce the candidate modes.In the implementation of CNN,we use float point number with 11 bits to express data and adopt straight line to fit activation function.The virtues of our algorithm include:(1)To alleviating the complexity of computation,our algorithm skip the RMD process and get the candidate list from CNN directly;(2)The inputs of CNN merely contain the source image pixels and quantization parameter(QP),this feature makes it friendly to high parallel hardwired encoder.(3)The corresponding CNN accelerator is designed by adopting the short floating-point arithmetic.As compared with original algorithm,experiments show that our algorithm decreases the average intra coding time by 27.92% while the corresponding BDBR augment is 1.15%.With TSMC 65 nm CMOS technology,the VLSI implemented CNN accelerator costs 56.1K logic gates and consumes 54.3mW power dissipation.The accelerator dealing with one PU prediction only need 696 clock periods.From the final results,proposed algorithm could reduce much computational complexity in intra coding mode and provide a basis for low power,low delay video encoders.
Keywords/Search Tags:HEVC, Intra Coding, PU mode decision, CNN, VLSI
PDF Full Text Request
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