Design Of High Performance Single Frequency Synthesizer

As an important part of particle accelerator,the RF system not only replenishes the energy loss of the beam,but also provides the bunching voltage that needed to prevent the longitudinal escape of electrons in the cluster.The RF system is usually composed of RF acceleration cavity,power source system and low-level radio frequency,in which the low-level radio frequency is used to ensure that the RF acceleration field reaches sufficient amplitude and phase stability.In the third generation synchrotron radiation source,the low-level radio frequency needs to achieve at least 1% amplitude stability and 1 degree phase precision.While the XFEL device needs higher performance requirements.For example,the low-level radio frequency designed by SHINE(The Shanghai HIgh repetitioN rate XFEL and Extreme light facility)needs to provide 0.01% amplitude stability and 0.01 degrees phase stability.The amplitude and phase stability of digital low-level radio frequency are affected by many aspects,such as ambient temperature,ADC(Analog-to-Digital Converter),DAC(Digital-to-Analog Converter),master oscillator and so on.As the basis of the whole digital low-level radio frequency,it is used not only to generate the reference signal with high stability,but also to produce the high precision working clock required by the ADC,DAC and FPGA(Field-Programmable Gate Array).Its performance is an important basis for determining the performance of the whole control system.Phase noise is the most important parameter to measure the performance of the master oscillator.At present,the main signal is generated by purchasing commercial signal generator.Shanghai Synchrotron Radiation Facility(SSRF)uses E8663 B signal generator to generate 500 MHz signal,which achieves the phase noise of-125dBc/Hz@1kHz.The Low-Level radio frequency based on the master oscillator achieves 1% amplitude stability and 1 degree phase stability.This way can be achieved quickly without extra spending in research,but it also carries a huge cost burden,especially in some commercial accelerators.The research of low phase noise master oscillator in particle accelerator will help to reduce the cost of engineering construction and the integration of control system.In this thesis,two different methods of direct analog synthesis and phase-locked loop(PLL)synthesis are used to design and implement a 500 MHz master oscillator suitable for SSRF.Both methods are based on printed circuit and choose the electronic components which are commonly used in the market.This method can well reduce the cost of fabrication and is conducive to the integration of the master oscillator into the control system in the future.The experimental results show that the two schemes meet the performance requirements of SSRF RF system,in which-132dBc/Hz@1kHz phase noise is realized by direct analog synthesis method,and-125dBc/Hz@1kHz phase noise is realized by phase-locked loop synthesis.The phase noise of the direct analog synthesis scheme in the 1MHz interval is better than that of the current master oscillator.In the future,the technology will be extended to 1.3GHz,providing a reliable master oscillator for the pre-research of Shanghai SHINE equipment.