Design Of An Elliptic Curve Cryptographic Coprocessor For Smart Card SoC

Due to its small size,low bandwidth,and high single-bit security strength,the elliptic curve cryptosystem is suitable for integration in resource-constrained devices such as smart cards.In order to meet the security needs of smart cards,a high performance and low overhead elliptic curve crypto coprocessor for smart card SoC is designed in this paper.Firstly,the AHB interface of the coprocessor is designed according to the bus timing.Configurable special function registers are defined on the hardware,which can be operated by a specific program.Secondly,a finite state machine for point multiplication is given based on the Montgomery ladder algorithm under projective coordinates.Point addition and point doubling can reuse a set of temporary data registers.Finite field arithmetic unit includes modular addition,modular multiplication,and modular square.Modular addition and modular squaring can be finished by combinatorial logic,while modular multiplication requires 163 clock cycles.Modular inversion can be converted to the above three operations by Fermat's little theorem.Finally,a cyclic shift register array is proposed.Simulation and hardware implementation results show that the proposed elliptic curve crypto coprocessor can complete a point multiplication in 170324 clock cycles with only 1621 LUTs and 654 slices.The coprocessor is synthesized and analyzed by SMIC 40 nm CMOS technology after FPGA prototype verification.Area report given by Design Compiler shows that 18.2K Gate Equivalent area is needed to implement the coprocessor.The power analysis results indicate that the average power consumption of the coprocessor is 23.2?W when the working frequency is 13.56 Mhz.In summary,the coprocessor is both compact and efficient,thus verify its feasibility and coordination with master device in smart card chip.