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Design Of Ring VCO For Charge Pump Phase Locked Loop

Posted on:2017-07-26Degree:MasterType:Thesis
Country:ChinaCandidate:Z L HeFull Text:PDF
GTID:2428330572996670Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
Phase-locked loops(PLLs)are widely used in high speed digital systems to generate low jitter on-chip clocks.This paper designs a charge pump phase locked loop based on ring VCO,first of all,the paper simply introduces the design of loop parameters of PLL system,on the basis of which,the behavior level modeling of PLL is emphatically studied,and establishes a more accurate behavior level model based on Verilog-A.Then the paper introduces the design of each circuit module of PLL,discusses the circuit implementation method of charge pump(CP)and voltage controlled oscillator(VCO)in detail,then the temperature compensation of VCO and PLL system is studied.Finally,the paper builds a model about PLL noise and make noise estimation of the whole PLL.analyses the effect of power supply noise,which reduce the performance of VCO phase noise.In the aspect of Verilog-A behavior level modeling,the main non ideal factors of the PLL components are considered,so that we can make an accurate prediction of the locking time in the early stage of the design.so as to verify and determine the value of loop parameters.In the aspect of circuit module designing.the paper attaches importance to analyzing the non ideal effect of charge pump,which leads to reference spurious.By optimizing the structure and parameters of the circuit,we can reduce the output current noise of the CP and periodic ripple interference on the control voltage of VCO.In addition.this paper focuses on designing the circuit of VCO,and mainly optimize the performance of VCO phase noise,then analyse the performance change of VCO and the whole PLL when temperature changes,and take measures to make corresponding temperature compensation for VCO and PLL.In the aspect of noise estimation,simulating and fitting the total phase noise of PLL by using MATLAB tool.Noise optimization is performed by selecting the optimal loop bandwidth,in addition,the paper analyse the effect of power supply noise,which reduce the performance of VCO phase noise,improve the power supply noise rejection ratio of VCO from two aspects of the delay unit and the bias circuit structure respectively and establish the equivalent noise source of power supply noise.
Keywords/Search Tags:PLL, behavioral model, temperature compensation, phase noise
PDF Full Text Request
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