Research And Implementation Of Graphics Rendering IP Core For IoT

At present,the Internet of Things(IoT)technology is booming,promoting a new round of industrial upgrading,and the world is entering the era of Internet of Everything.At the same time,people are eager for a more humanization of human-computer interaction.The graphical human-computer interaction interface is replacing traditional mechanical switches,mechanical pointers and even LED digital tubes.Owing to the application and popularization of Internet of Things technology and graphical human-computer interaction,the graphical display requirements of IoT scene are growing.However,the increasing complexity and resolution of graphical interfaces have brought new challenges to the computing power of embedded graphics systems.Traditional embedded MCU solution is difficult to meet the demand for computing power in complex graphics rendering,resulting in serious performance degradation of the system.The specific hardware acceleration unit(Chrom-Art Accelerator,customized 2D GPU,etc.)have been used to assist the embedded CPU to execute the graphics rendering,release the CPU's computing power,improve the performance of the system,but these hardware acceleration units support fewer graphics operations,and many graphics effects cannot be achieved,greatly reducing the flexibility of the graphical interface design.There is still no hardware acceleration solution for the graphical display system that is perfect for IoT scenarios.This dissertation focuses on the research and implementation of graphics rendering IP core in IoT scenarios.Firstly,the advantages and disadvantages of IMR and TBR graphics rendering architectures are compared,the choice is applicable to the embedded TBR graphics rendering architecture.The bottleneck of the TBR rendering architecture is analyzed and found,and corresponding solutions are proposed.Study the existing high-speed data fetching architecture,compare the impact of different Caches on data access performance,and make some improvements.Proper graphics rendering process in this dissertation is proposed on the basis of requirements of the interface display in the IoT scenario,and related algorithms is optimized.Finally,a graphics rendering IP core test platform was built to verify and evaluate the system.The experimental results show that the system renders a single image up to 330fps,and the normal graphics display interface frame rate is about 65fps when the screen resolution is 800×480.The pixel fill rate of proposed system and other graphics acceleration units are compared,it indicates that The IP core rendering performance is excellent.The main research work of this dissertation is as follows:(1)Comparing the advantages and disadvantages between two rendering architectures of Immediate Rendering Mode and Tile Based Rendering,considering the characteristics of the IoT graphics display system,we design a TBR graphics rendering architecture.This design realizes the tile task with hardware logic,and reduce intermediate data caching with real-time generation.This dissertation introduces the impact of data access on sy'stem performance,and has designed LRU group association Cache and 4-ports Cache.It also optimizes the data access path of the graphics rendering IP core.(2)Relating to the graphic display requirements under the IoT scene,an overall scheme of the graphic display system is designed.This dissertation designs a graphic rendering pipeline for IoT scenes,which can fill specific color in specific areas and support Alpha blending and geometric transformation like translation,rotation,scaling and projection.This dissertation also provides a fast division algorithm with fixed cycles,it optimizes key division operation in IP core for graphic rendering.This dissertation models the proposed graphic rendering algorithm in software and verifies the feasibility of the algorithm,which provide support for subsequent hardware design and testing.(3)This dissertation establishes a system verification platform based on FPGA,through comparisons in software and hardware,we test the correctness of the IP core for graphic rendering,we also analysis the performances of proposed IP and compare with other designs.The results show that the Pixel-Fillrate of the IP core is 128.3 Mpixel/s and the rendering efficiency is better than related graphic acceleration units,which can fully meet the real-time requirements of graphic display in the IoT scene.This dissertation finally finished the synthesis work of the IP core for graphic rendering.The results show that its area is 6.3mm2 and its power consumption is 60.7mW after synthesis.