Modulation Pattern Recognition Based On Full Digital Receiver And FPGA Implementation

With the rapid development of telecommunication technology,the signal in the communication frequency band is becoming more intensive.Communication signals with different power,bandwidth and modulation modes coexist,which makes the actual communication environment more complex than ever.In the field of signal reconnaissance and recognition,modern reconnaissance receiving equipment must have the ability to intercept,detect and to recognize the real-time signal in dense,complex and dynamic signal processing environment.In the current communication reconnaissance,there is an increasing requirement for the detection distance.In the long-distance reconnaissance,the actual signal received by the receiver is rather weak.At that time,the received signal will be influenced intensely by the environmental noise and the instrument background noise.It is necessary to extract and identify the remote weak signal from the noise effectively.All of these above have put forward new requirements for the sensitivity and anti-noise ability of recognition equipment.At present,the communication reconnaissance equipment usually works under several known or hypothetical signals.When processing signal in the unknown and dynamic environment,the accuracy of real time recognition will decrease.Moreover most of the recognition algorithms are studied at the theoretical level,and the signal sources used are usuallygenerated by software simulation,which is not suitable for hardware implementation because of its high complexity in practical application.Under the above background,the development status of modulation pattern recognition of communication signals is studied in this thesis firstly.In view of the high complexity of current recognition algorithms in engineering practice,a modulation pattern recognition algorithm based on all-digital receiver under the complex and dynamic situation is proposed in this thesis,and its FPGA design is realized.The construction of hardware identification platform is completed,and the actual collected air interface signal is successfully received and recognized based on the hardware platform test,and at last the recognition performance of the algorithm is verified.In the complex environment with unknown input signal and dynamic change of detection distance,automatic gain control technology is used to eliminate the influence of dynamic change of signal energy caused by receiving distance and control the received signal in a certain range.Then the frequency offset of the received signal is removed by the carrier estimation technology.Bit synchronization technology is used to synchronize the Receiving and transmitting clock,and carrier synchronization is used to track the residual frequency offset and demodulate the input signal.On this basis,a scheme of modulation pattern recognition is proposed,which distinguishes FSK and PSK signals by frequency offset tracking curve of carrier tracking loop and recognizes BPSK and QPSK signals according to demodulated baseband signals.Under the development environment of Quartus II,the hardware implementation of the proposed method is completed.The whole system is modeled at the RTL level by using hardware description language,and the synthesis of each module is completed,the design and construction of its FPGA are realized,and the function simulation is carried out by using SignalTap ?.The chips used in this thesis are ADS5444 and Stratix II EP2S180F1020C4.The simulation and test results show that the system can receive and recognize signals under the dynamic change of the input signal energy,and the recognition rate meets the actual engineering requirements.