Research On Low-voltage Broadband PLC System Based On FPGA

Low-voltage power line communication can use the existing power line as transmission media,and has a series of advantages such as low investment cost,short construction period,easy installation and communication security.It is one of the powerful solutions for the “last mile” problem.At present,low-voltage PLC technology has developed rapidly,and it is moving toward high-speed and broadband development.However,the low-voltage power line was designed for transmission of power,and its poor channel environment seriously affected the quality of communications.OFDM modulation has the advantages of anti-frequency selective fading and high frequency brand utilization.It has become the mainstream modulation method of low-voltage broadband PLC now.This thesis studies the low-voltage broadband PLC system based on OFDM modulation,and implements the design of key modules in the system with FPGA.The main work is as follows:First,this thesis discusses and analyzes the low-voltage broadband PLC system based on OFDM in detail.First,system physical layer architecture,physical layer OFDM symbol,and system parameters are introduced.Then,the key techniques of the system are analyzed.The P symbol in preamble sequence has good constant envelope and auto correlation characteristics.It can be used for AGC and receiver synchronization.The double-binary Turbo coding adopts a precoding mechanism to ensure the loop of the state.The multi-stage channel interleaving technology has stronger anti-burst error ability.In addition,other key techniques such as scrambling,constellation mapping,and window functions are discussed.Second,the system introduced in this thesis has high transmission rate,strong performance and complex system structure.It adopts double-binary Turbo coding and multi-stage channel interleaving technique,which has stronger robustness.However,it is difficult to implement the system with FPGA.After researching the system protocol,writing Verilog language and debugging for a long time,the author completed the design of key elements of transmitter.This thesis gives the FPGA-based design method,implementation process,and simulation results for the key elements of the transmitter,mainly including: a preamble generation unit,a scrambler unit,a Turbo encoder unit,a channel interleaving unit,a diversity copy unit,a constellation mapping unit and so on.Finally,for the synchronization-sensitive problem of OFDM system,this thesis has a research on the problem of symbol timing synchronization in low-voltage broadband PLC system.First,the symbol timing synchronization errors of the OFDM system are analyzed in detail.The timing lag will lead to demodulation errors,and timing advance will only introduce phase rotation.Then,the classical Schmidl algorithm and Park algorithm are introduced briefly.Further,for the preamble which is made of 10.5 P-symbols and 2.5 M-symbols in this thesis,an improved delay correlation algorithm is proposed.The performance of this algorithm is affected by the SNR.Then,this paper has a research on the traditional cross-correlation algorithm based on training sequences.The algorithm makes up for the deficiencies of the delay correlation algorithm,and it can produce sharp peaks.It still has a good performance in low SNR environments but it is too difficult to implement with FPGA because of its high computational complexity.Finally,to overcome this problem,this thesis proposes five simplified improved algorithms.After implementing the algorithms in Matlab,the performance of various methods are analyzed and compared.The method of using P-symbol quantization and simultaneous absolute value normalization is finally determined.An improved symbol synchronization algorithm is implemented with FPGA,and it has good symbol timing synchronization performance.