Research On Synchronous Output Data System Of Inertial Navigation System

The inertial navigation system(INS)mainly navigates the ship through the accelerations and angular velocities measured by the gyroscopes and accelerometers.The synchronous output data system is an important part of the inertial navigation system whose data transmission should be real-time,otherwise it will affect the overall performance of the inertial navigation system.However,there is a time delay problem in the system of synchronous output of an inertial navigation system.Improving inertial device hardware performance and using software algorithms are often used by domestic and foreign scholars to solve the problem.As the performance requirements of INS systems increasing,measures mentioned above will not be effective enough.The synchronous output data system of the inertial navigation system is studied deeply in this paper.A method combining software and hardware is proposed to solve the delay problem of the synchronous output data system of INS.Firstly,the working principle of the synchronous output data system of inertial navigation system is analyzed.It is found that there is an asynchronous problem between the second pulse of the synchronous recording device and the clock of the inertial navigation system,which causes the time delay of the output data of the inertial navigation system.By analyzing the logical relationship between the navigation data,the inertial clock and the second pulse of the synchronous recoder,a mathematical model for determining the time delay is established which needs the time counting result of the clock cycle as a parameter.Therefore,a scheme of designing a timing counting board based on PCI bus communication is proposed,which realized timing counting of the clock cycle.Three interpolation methods,Least Squares,Bessel and Lagrange,are used to realize the error compensation of the time delay by the polynomial curve fitting.Through the simulation of the three fitting methods,it is found that the least squares fitting method is relatively effective.Secondly,the whole design and development process of the timing counting board based on PCI bus communication are given.The board uses 82C54 programmable logic chip to achieve timing counting of inertial device for data transmission clock cycle,the specific interface chip PCI9030 to achieve PCI bus interface,Xilinx Spartan-6 series chips to achieve 82C54 timer counting chip,PCI9030 interface and UART logic control module.Then,the basic structure of the PCI bus and the functions of each module chip are introduced in detail.The main contents of the board are described from the aspects of hardware and software respectively.Hardware: realizing the hardware circuit of PCI bus interface;completing 82C54 timer count hardware circuit;completing PCI9030 and FPGA connection circuit;completing UART serial circuit.Software: using WinDriver development tools to prepare drivers;using VC++6.0 MFC control to design receive data display interface of PCI bus.Finally,simulate and test the entirety scheme.Simulation: PCI bus reading and writing timing simulation,UART module data receiving and sending function simulation and 82C54 timer counting function simulation.The timing count value latched by FPGA will be sent to the upper computers by the serial port and the PCI bus data line respectively and the timing count results will be shown on serial debugging interface and PCI data communication interface.By comparing the data of two display interfaces,it is verified that the board can realize the function of time counting and normal communication.