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FPGA Design And Implementation Of UHF RFID Reader Based On Software Radio

Posted on:2019-04-22Degree:MasterType:Thesis
Country:ChinaCandidate:D D HuangFull Text:PDF
GTID:2428330548476311Subject:Electronics and Communications Engineering
Abstract/Summary:PDF Full Text Request
In recent years,radio frequency identification technology has been widely interested in industry and academia and has been widely used in the fields of logistics,industry and medical care.The widespread application of radio frequency identification has led to the emergence of radio frequency identification tags of various frequencies on the market.Different tags cause trouble to the design of a reader,and often require separately designing according to different frequency bands,resulting in high capital waste.Based on this,this paper uses the advantages of software radio to design a universal RF reader based on the realization of the reader to read and write labels of different frequencies.After the research on the background and development status of the subject,based on the USRP N210 platform,through the FPGA development of the platform,the design of the entire RFID reader has been realized.The specific design work is as follows.The two parts of the research project design work,one of the: send and receive links in the FPGA added a new up and down converter,the original up and down converter cascaded with CIC and HB filter design,the design adds FIR filter To improve the performance of the link.Then,the problem of passband degradation after multi-level cascading of CIC filters is proposed.The proposed ISOP compensator is optimized for CIC filtering.By using the Xilinx open source kernel to realize the module design of the link,the actual situation of the module of the radio frequency identification system is taken into consideration,and the parameters of each module are calculated by using the formula to realize the configuration of the IP core.MATLAB was used during the generation of HB and FIR filter coefficients,the coefficients into the IP core,the IP core generation,the use of Modlsim waveform simulation.Second: the original modulation and demodulation module implemented on the host FPGA to achieve,without violating software and radio can be configured to achieve the goal of improving data processing speed and reduce the host-side data processing pressure.A design scheme of modulator and demodulator based on URSP N210 is proposed.Based on the structure and principle analysis of each module of modem,the modem design is realized.Finally,the communication between tags and reader was detected,and the data transmission was realized at 915 MHz and 435 MHz respectively.The RFID reader based on software radio was verified to read and write at different frequencies.Then we compared the success rate of modem based FPGA and host-based reader communication,and analyzed the reason of this situation.
Keywords/Search Tags:RFID, FPGA, USRP, Up and Down Converter, Modem
PDF Full Text Request
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