An LDO Design Of A Multiphase Buck PWM Controller

With the concept of intelligence goes deep into all aspects of life,all types of terminal products have higher application requirements,and the requirements for power management chips will increase accordingly.Among all power management schemes,Linear Voltage Regulators(LDOs)are gaining more and more attention.According to statistics,in the application of power chips,the LDO market share is as high as 20%.In this thesis,an LDO suitable for a multi-phase buck PWM controller is designed.The LDO input voltage range is 3-10 V.When the power supply voltage is between 3V-6V,the LDO enters the dropout domain.Between 6V-10 V,the output voltage is stable at about 5.5V.Based on the working principle of the integrated LDO and the requirements of the LDO for the multi-phase buck pulse width modulation controller,The various components of the LDO are designed,including the bandgap reference(BGR)and error amplifier(Error Amplifier,EA).power tubes,auxiliary circuits,etc.The Huahong 0.35?m BCD process was used to design the simulation of each component module and the overall LDO circuit using Cadence's SPECTRE software.Finally,the LDO layout is finished.The innovation of this design is as follow: for the problem that the power consumption of the circuit increases due to the fact that the drain current is too large when the power transistor is powered on,a start-up surge current suppression circuit is proposed,and an NMOS transistor is introduced,whose source is connected to the gate of power transistor,the charge is injected into the gate of power transistor to increase the gate voltage of the power transistor,which effectively suppresses the problem of large drain current during the power-on start-up of the power transistor and reduces the power consumption of the circuit.In addition,in order to better stabilize the output voltage of BGR,a current-mode amplifier is used to form a two-loop structure and the two currents are forced to be equal,so that the reference output is more stable,and the area is saved compared with the voltage-type amplifier.The TT,SS and FF multi-process corner simulations were performed on theLDO overall circuit.The results show that when the temperature changes from-40?to 125?,the LDO output voltage has a maximum variation of about 47 mV,and the temperature coefficient is about 52ppm/?.The minimum power supply rejection ratio(PSRR)at the multi-process corner is about-40 dB at the low-frequency condition and the maximum value is about-81 dB.The linear adjustment rate is about1.6mV/V.When the load current is between 0-100 mA,the load regulation is0.034mV/mA.At full load,the phase margin is 71° and the system is relatively stable.Dropout voltage difference is about 0.16 V.The LDO quiescent current value is 0.36 mA.Integrating various performance parameters,the LDO in this thesis achieves the design goals and meets the requirements of a multiphase buck PWM controller.