Design And Implementation Of The Two-dimensional Code Recognizer Based On Zynq Scalable Processing Platform

With more and more extensive application of Internet of Things technology,it has a very big impact on the improvement of traditional industries.The economic development mode is driven by the industrial Internet of Things,from the manufacturing method to the innovative method.The two-dimensional code automatic identification technology is one of the key and core technologies of the Internet of Things technology.Under the industrial environment,due to the uncertainty of the product range,in order to ensure the collection of barcode images,the image acquisition scope needs to be expanded when the images are captured,but this also leads to an increase in the geometric progression of the amount of image processing data,which is based on the The detection and recognition speed of the system under the ARM architecture slows down and the power consumption of the equipment increases.In the industrial industry that pursues the optimization of costs,it leads to an increase in product costs and a decrease in product competitiveness.This design uses the Xilinx extensible processing platform(Zynq-7000)to achieve two-dimensional code positioning and recognition.The Zynq-7000 processor not only has the parallelism and concurrency of the FPGA,but also has the excellent control performance and ecological resources of the ARM processor,improves the resource utilization,reduces the power consumption of the device,and reduces the system cost.Therefore,the research in this paper has a certain degree of research.Economic application value.The topic of the bar code identification system research in accordance with the direction of image data transmission is divided into four parts:image data acquisition,image data transmission and storage,image data preprocessing,image recognition,image display.Hardware system implementation is based on Autum Designer15 software,which mainly includes image sensor MT9V034 circuit,power supply circuit,Zynq configuration circuit,minimum system interface,HDMI/VGA video display,Uart to USB interface circuit,and so on.This design designs the control IP of MT9V034 on the PL end,mainly used for collecting the image data,transform into the required format.In the role of VDMA,through the AXI HP interface,the image data that conforms to the AXI_Stream protocol is stored in the DDR,and three buffer areas are divided in the memory to achieve image acquisition,storage and image display ping-pong operation and real-time seamless transmission.Using VDMA to read and write channel interrupts,control the target address of the write channel in read interrupts,solve the "cutting" phenomenon between read and write,to obtain a frame of static image transmission to the PS end for two-dimensional code image recognition operation,the recognition result Through Uart to USB interface to the PC.Finally,through the HDMI module,sent to the display for display.This design focuses on the analysis of the structure,positioning and rotation correction algorithms,recognition steps,and RS decoding of two-dimensional code graphics.Based on the natural parallelism processing features of image processing,detailed analysis of the algorithm implementation,a reasonable division of the PL side and PS side Tasks and features.The implementation of hardware PL is based on Xilinx software and hardware collaborative development tool Vivado HLS,and it is designed to realize two-dimensional code image preprocessing,position detection pattern positioning,and two-dimensional code image rotation correction hardware HLS IP.PS-side implementation is the rapid development of operating system-free application software using board-level support packages in the SDK of the development tool.It mainly includes functions such as HLS IP driver settings,VDMA drivers,static image reading,and two-dimensional code identification,and finally joint debugging.Completion of hardware and software functions work together.