Research On Convolutional Neural Network Model Based On Xilinx Zynq Platform

With the development of neural network,convolutional neural network has gradually become the preferred algorithm in the field of image processing.However,the algorithm complexity of convolutional neural network is too high to achieve it on devices for mobile platforms.Therefore,in recent years,research on FPGA-based convolutional neural network has become increasingly popular.FPGA is suitable for designing parallel computing,but it is unsuitable for designing software that can be easily implemented by general-purpose processors.Therefore,designs for mobile platform often use both an FPGA and a separate micro-processor,but it increases development cost and is harmful to improve system performance.To solve these problems,Xilinx introduced Zynq series,which integrate both FPGA and ARM in one chip and can easily solve the problems of high communication cost and high development cost brought by the traditional multi-chip design.So Zynq series is quite suitable for mobile applications that require hardware acceleration.Based on the Xilinx Zynq platform,this thesis designs a scalable convolutional neural network computing model.This thesis first introduces convolutional neural network and Xilinx Zynq platform,and then analyzes the key points of implementing convolutional neural network on FPGA and proposes several optimization designs for them.Then the model which is designed based on Xilinx Zynq platform is introduced in detail,and several optimization designs are proposed for extending the model.Finally,the model loaded with Yolov2-tiny network is used to experiment the correctness and performance,and the scalability of the model is analyzed in the end.The experiments show that the model proposed in this thesis has good performance and scalability.The computing model uses an array of multiply-adders to achieve high-performance parallel computing,this array computes layer by layer.In addition,this model also uses several stream processing modules,which solidify several layers whose numbers of input and output channels are small into the FPGA to realize streaming computation of input data.The stream processing modules do not need to cache the weights data and the runtime data in external memory,so it has no data transmission between FPGA and external memory,which is beneficial to improving the overall computing efficiency and is flexible to deploy.On the Xilinx Zynq 7020 platform,the 16-bit fixed-point model in this work running at 100 MHz achieves 11.23 frames per second on Yolov2-tiny network,and the performance of the model is 30.37 GOP/s.Compared with the CPU i5-8250 U,the performance and energy efficiency of this model are 4.88 times and 33.29 times those of the CPU.Compared with other researches,this model also has advantages.In addition,this model also has good scalability and supports dynamic acquisition and configuration of the network structure,which can adjust the network structure in the model at runtime,and can even run multiple networks simultaneously.