Hardware/Software Co-design And Implementation Based On ESL And SM2 Algorithem

With the development of e-commerce,mobile payment,intelligent terminals and other related products and services,people's lives are improved while the security risks are increasing,such as illegal intrusion,hacking,network fraud,which bring lots of serious threats to the privacy of users,therefore,proposing and developing encryption algorithm complied with the requirements is more and more urgent.At present,RSA algorithm and elliptic curve encryption algorithm have been studied deeply and used widely in embedded encryption chip,especially for elliptic curve public key algorithm,which has beening gradually replacing the RSA algorithm because of its short key,fast executing speed and high safety.SM2 algorithm is a kind of improved algorithm based on elliptic curve algorithm and as it is a domestic algorithm,SM2 has higher security.In these days,a large number of encryption chip manufacturers provide embedded encryption chip based on SM2 algorithm,which have been widely used in the application of encryption and decryption,digital signature and authentication,etc.Due to the high complexity,the long execution cycle,and the strict demand of performance and overheads in embedded systems of SM2 algorithm,the So C chip designing based on this algorithm need to make a software/hardware(HW/SW)partition in an early stage,and choose the appropriate architecture based on the different needs to balance the performance and resource.Concerning the problem that the development cycle of existing elliptic curve algorit hm system level design was long and the performance-overheads indicators were not clear,a method of HW/SW co-design based on Electronic System Level was proposed.This method presented several HW/SW partitions by analyzing the theories and implementations of SM2 algorithm,and generated cycle-accurate models for HW modules with System C.Module and system verification were proposed to compare the executing cycle counts of HW/SW modules to obtain the best partition.Finally,the ESL models were converted to Rigister Transfer Level(RTL)models according to the CFG(control flow graphic)and DFG(data flow graphic)to perform logic synthesis and comparison.In the condition of 50 MHz,180nm CMOS technology,when get best performance,the execute time of point-multiply was 20 ms,83 000 gates and the power consumption was 2.23 mw.The experiments result shows that the system analysis is conducive to performance and resources evaluation,and has high applicability in crypto chip base on elliptic curve algorithm.The embedded So C based on this algorithm can choose appropriate architecture based on performance and resources constraints.