The Heart Sound Acquisition System Design And Signal Denoising Analysis Based On FPGA

In recent years,the incidence of congenital heart diseases increase year by year,which cause great harm to mankind.But this disease is not an incurable disease,as long as the patient can be found early,and get the treatment in time,it is possible to recover.Early symptoms of congenital heart disease is not obvious,so it is difficult to diagnosis clinical,usually rely on doctor who has many years experience on auscultation with a stethoscope to diagnosis,however this diagnosis method is difficult to popularize in some remote mountainous areas.This paper makes a deep research on heart sound signal,which have designed a heart sound signal acquisition system based on FPGA,and analyzed in signal denoising.The author hopes that the research would help the making of heart sound signal acquisition device with high quality for basic medical staff to use,which could provide an important reference for doctors to diagnose congenital heart disease.In this paper,the heart sound acquisition system and heart sound signal are studied.Firstly,introduce the research status of the heart sound acquisition system,then combining with the characteristics of heart sound signals,finally choose the heart sound acquisition system design based on FPGA.The main work of this paper is as follows:The first section.Convert the heart sound signal to electrical signals by a heart sounds sensor.Taking into account the heart sound signal has the characteristics of large noise and small amplitude,design the front-end circuit to transmit the heart sound signal to the FPGA,the heart sound signal is followed and amplified in the circuit,taking into account in order to auscultation,add an outgoing module to monitor the heart sound in real time.The second section.The use of the traditional acquisition system A/D conversion chip is 12 bit,the acquisition system designed by the author use WM8731 audio chip which A/D conversion chip is 24 bit to conduct A/D conversion in FPGA.Compared with the traditional acquisition system,this acquisition system has higher accuracy,higher resolution,and its sampling rate can reach 96KHz at the same time.The third section.Analyze the heart sound denoising,because of the heart sound signal frequency difference is so low,so design the FIR low-pass filter on the FPGA to complete the heart sound signal denoising.The fourth section.DM9000A chip have been used on the network transmission design,on account of the network controller operation of the device is too complex,the author use the the Nios? soft core in the Quartus ? to complete a SOPC system,this simplifies design a lot.So you can complete transmission of the collected data through Ethernet to the PC.The fifth section.The transmitted signal is displayed by the host computer,the host computer is designed by using C#language and Measurement Studio plugin to realize the data display.