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Research On The Key Techniques Of Time Synchronization System For Power System

Posted on:2021-03-08Degree:MasterType:Thesis
Country:ChinaCandidate:Y F WuFull Text:PDF
GTID:2392330623968062Subject:Electrical engineering
Abstract/Summary:PDF Full Text Request
In modern society,the role of electric power system to social economy is self-evident.However,with the rise of the concept of smart grid,the degree of power system automation is constantly improving,and the power network is constantly expanding,the traditional time synchronization method can no longer meet the precision requirements of smart grid.Based on this basic situation,a new high precision time synchronization strategy is proposed to improve the current time synchronization accuracy and is verified by the hardware platform.This paper firstly systematically analyzes the theoretical principles and application scenarios of several widely used time synchronization modes at present,compares their advantages and disadvantages,and finally analyzes the advantages of IEEE1588 protocol;Then,aiming at the shortcomings of IEEE1588 protocol application in Ethernet network,the time synchronization strategy of IEEE1588 over SDH based on FPGA was proposed.This paper designs the hardware platform verification scheme based on FPGA on the basis of IEEE1588 protocol theory analysis.In order to ensure the normal work of FPGA chip,this paper selects appropriate FPGA chip according to the requirements of verification scheme and modularizes FPGA verification scheme through different functions,which is mainly divided into clock unit,crystal vibration compensation unit,algorithm processing unit,data processing unit,IEEE1588 algorithm unit and external communication unit.The clock unit is responsible for providing working clocks with different frequencies for the verification platform.The crystal oscillator compensation unit compensates the clock source frequency deviation from the clock device.The algorithm processing unit filters the time error.The data processing unit provides a universal data transceiver interface for the algorithm unit.IEEE1588 algorithm unit includes the best master clock algorithm and the implementation of port state machine;The external communication unit is used to output time information or to set local clock property sets externally.After the simulation of basic functions,this paper analyzes the possible error types in the process of time synchronization,including the drift accumulation error of the clock source,the dither error of the transmission medium and the error of time stamp intercept.The frequency error of clock source can be processed by crystal vibration compensation module.Aiming at the randomness of dither error of transmission medium,Kalman filtering algorithm combined with single neuron PID control is adopted for optimization.Timestamp interception error can be considered to optimize the message sending process.At the end of the paper,the hardware platform is tested for practical functions,and the long-distance time synchronization accuracy is tested by taking PMU equipment as the test object.The test results meet the precision requirements of power system and can be used in scenarios such as wide-area measurement systems or inter-station longitudinal differential protection.At the same time this paper puts forward the improvement method to the deficiency of the thesis.
Keywords/Search Tags:power system, IEEE1588, SDH, FPGA, error processing
PDF Full Text Request
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