Research On Key Technologies Of Radar Broadband Digital Receiver

In complex electronic warfare environment,radar broadband digital reconnaissance receiver needs the ability to process multi-channel and wide-bandwidth signals in real time.Broadband digital receiver uses high-speed A/D converter to convert analog signal to digital signal,and carries out a series of down-conversion processing to the digital signal,finally obtains the signal that can be analyzed and recognized by programmable logic array and digital signal processing device,and uses digital signal processing technology to extract and store useful information in the signal.With the development of digital technology and digital processors,radar digital receivers are developing in the direction of high resolution,high probability of interception and large dynamic range,which has gradually become the main research direction in the field of electronic reconnaissance.Based on the previous research results,this paper studies the key technologies of radar broadband digital receiver in reconnaissance field,including digital down conversion technology and Broadband Digital Channelization technology.In this paper,the technology of broadband digital down-conversion based on FPGA is studied.Firstly,the related theoretical basis of digital down-conversion is studied,and an optimized CORDIC algorithm is proposed.It is applied to the design of digital down-conversion module.A two-stage filtering method of cascaded single-phase rate wave with polyphase filtering is designed,which reduces the large consumption of hardware resources by single-stage filtering.The optimized digital down-conversion structure and the digital down-conversion structure implemented by IP Core are simulated and compared.The experimental results show that the optimized digital down-conversion structure occupies less resources and is more suitable for popularization.In this paper,the structure of Digital Channelization is deduced by mathematical formula.The efficient structure of Digital Channelization in various application scenarios is analyzed.The common problems in the process of Digital Channelization are discussed,and the solutions are given.Aiming at the design of Digital Channelization efficient structure,the simulation in MATLAB verifies the rationality of the structure.The design of digital channelized structure based on multi-DFT is completed,and the simulation is carried out in the FPGA.Compared with the previous simulation of MATLAB under the same conditions,the results are in good agreement and meet the design requirements.