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The Research Of Hardware Design On Acquisition Card And Multichannel Synchronization Technology On Scopecorder

Posted on:2020-06-17Degree:MasterType:Thesis
Country:ChinaCandidate:X S HeFull Text:PDF
GTID:2392330596475145Subject:Instrument Science and Technology
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With the rapid development of science and technology,it is an important research direction for instrument science and technology to reflect the multi-domain waveform details of the tested object more clearly,more comprehensively and more accurately.With the development of integrated multi-channel measurement technology in the electronic industry,the ScopeCorder which can simultaneously collect and store multiple types of measured signals in multi-channel mode has been attached great importance by the development of industrial technology.With the increasing bandwidth and the increasing number of multi-channel of the instrument,the multi-channel synchronous design technology is particularly important for the multi-channel synchronization Scopecorder.In the high-speed multi-channel measurement system,multi-channel synchronous measurement performance affects the analysis of the test results directly,Compared with the channel and waveform similar to "vertical" regulation like offset or gain adjustment,the multi-channel waveform of "horizontal" synchronization regulation is not only a single system with certain compensation or adjust algorithm can solve completely.More importantly,it is necessary for designers to analyze the reasons of asynchronous acquisition from the aspects of system module hardware,data transmission logic,global clock network and multi-channel synchronization regulation,The multi-channel synchronization of ScopeCorder should be studied from the point of treating symptoms firstly.This article is edited by the research of ScopeCorder which based on the laboratory project,Analysed the problem from the perspective of the underlying hardware and the ScopeCorder multi-channel synchronous clock problem,then proposed a multichannel synchronous technology scheme,and designed the corresponding high-speed hardware module for this technical solutions,the main research work of this article has the following several aspects:1.The design scheme of high-speed acquisition module and and the 128-channel display on ScopeCorder has been studied in detail,Discussing the phenomenon of the multi-channel phase randomness on ScopeCorder,Analyzing the cause of the problem and proposing the solutions through the comparison test of hardware.2.An optimized high-speed board card solution is proposed,and multiple types of dual-channel acquisition modules with multiple sampling rates are designed.For example,the highest sampling rate is 100MS/s,12 bit,isolation acquisition system are designed.The measurement accuracy of each channel 0.5% is guaranteed.3.8-channel source synchronization interface which each single card slot rate of 3.2Gbps and the system's global clock network are designed to ensure multi-channel synchronous sampling and synchronous transmission from the perspective of clock design and functional control.4.The above design platform is used to test the feasibility of multi-channel synchronization technology from the two perspectives of in-card channel synchronization and inter-card slot channel synchronization,and different types of modules are used to test,ensuring that the in-card dual-channel synchronization accuracy and inter-card slot channel synchronization accuracy are less than 20 ns.Through the final test and verification,it is shown that the ScopeCorder that supporting dynamic reconfiguration can complete the multi-channel synchronous design through means of digital trigger between the card slot and the card slot.The relevant indexes meet the design accuracy which less than 20 ns,and Channel High Precision Sampling with Clock Jitter Lower than 311 fs,which further verifies the feasibility of the multi-channel synchronization technology on ScopeCorder that proposed in this paper.
Keywords/Search Tags:ScopeCorder, High-speed data acquisition, Multi-channel synchronization, Clock design, System reconfiguration
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