The Simulation And Analysis Of DDR Memory Circuit Of Navigation Display System

As the high requirements on noise energy and timing error of DDR memory circuit of navigation display system,this article finishes the design of DDR memory circuit of navigation display system,with the method of simulation analysis of signal integrity and power integrity to simulate the layout and wiring of DDR high-speed network.Details see as below:According to the standards and requirements of the technical parameters of DDR memory circuit of navigation display system,this article finishes the wiring design of controlling the basic noise by means of simulation analysis of basic noise of DDR memory bus networks with Cadence simulation tools.This article confirms the methods of matching the resistors and adjusting the network connections through simulation results and to design the layout and wiring of the circuit in details.Compared with the design requirements of memory circuit,the noise margin index is improved by about 33%,which effectively controls the influence of basic noise on the system.For the accuracy of DDR memory data and gate signal sequence,this article calculates the DDR signal sequence in details and starts the sequence simulation of signal with Cadence,based on the parameters of establishment time and hold margin.According to the simulation results,to confirm the wiring length of bus network which can convert into aconstraint rule,to guide the layout and wiring tasks of sequence signal;at last,finish the simulation and verification of the wiring sequence,which avoids timing errors in the storage module at run-time.According to high efficiency requirements from navigation display system for DDR memory power module,this article starts the simulation and analysis of the power integrity of power module with the Allegro PCB PI Option.According to the power demand to analyze Ohm's law,to calculate and confirm the target impedance of the system,so as to establish the power distribution system model and to design the decoupling capacitor of the system in details.In the power usage effectiveness,the simulation result of the model is improved by about27.6% compared with the system design index.