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Research And Implementation Of High-speed Communication Interface For Integrated Avionics System

Posted on:2018-08-16Degree:MasterType:Thesis
Country:ChinaCandidate:C Z CaoFull Text:PDF
GTID:2352330515999039Subject:Control Science and Engineering
Abstract/Summary:PDF Full Text Request
With the continuous upgrading of avionics technology and the rapid development of China's aviation industry,the comprehensive level and complexity of airborne avionics systems are escalating,and a large amount of data needs to be transmitted in real time.Therefore,the data transmission rate of the communication interface and the type of communication interface put forward higher requirements.High speed serial communication technology,with its high bandwidth and stable performance,is rapidly replacing the traditional parallel technology,which has become the mainstream of the industry.In this paper,two kinds of high-speed communication interface based on GTX and LVDS are designed respectively on the basis of a signal processing board using Xilinx's Kintex-7 series FPGA.GTX is a kind of high-speed serial transceiver with fast speed,low power consumption and low cost integrated in Xilinx FPGA.In this paper,the structure,working principle and implementation method of GTX are researched.On this basis,a high-speed communication interface design based on GTX is proposed.High-speed data transmission based on GTX is realized by hardware description language Verilog,and the simulation is correct.Finally,the design is debugged with Xilinx online logic analyzer(Chipscope),realizing communication between the two signal processing boards.The debugging results show that the bit error rate is as low as 10-12 at the line rate of 3.125Gb/s,which proves the correctness of GTX high-speed interface design.Low-voltage differential signaling(LVDS)is a high-speed serial interface technology and has been widely used in high-speed data transmission.In this paper,the design of LVDS interface transceiver is deeply and systematically studied.Firstly,some hard IP core related to LVDS interface in Kintex-7 FPGA and source-synchronous clock systems are introduced.Then,the problems of clock data matching,receiving data alignment and drift are discussed,the corresponding solutions is proposed.Design and implement a kind of LVDS interface transceiver on the software.Finally,using the Chipscope board debugging,the results show that when the transmission rate is 1Gb/s,the bit error rate is at 10-12 level,which proves that the design of LVDS high speed communication interface is successful.
Keywords/Search Tags:avionics technology, FPGA, high-speed serial communication, GTX, LVDS
PDF Full Text Request
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