The Application Research And Implementation Of High Speed Interface In LTE-A Baseband System

Long Term Evolution Advanced(LTE-A)technology,which is widely used at the present stage,has been able to provide users with 1Gb/s downlink peak rate to enhance the user's ultimate experience.On the market,due to the continuous improvement of communication technology has promoted the continuous improvement of the transmission rate in the mobile communication system,the traditional parallel interface is more and more difficult to meet the requirements of data communication between the chips and the boards at present.So more and more new high speed serial buses are applied to the data exchange between the chips and the boards in various application scenarios.Thus,the high-speed serial interface is bound to become the mainstream interface in baseband platform.Based on the project "Research on Key Technologies of LTE multi UE base station load and capacity test",the significance of the research,the high speed serial interface development status,the main functions with architecture of the baseband processing platform and chips in the project are firstly introduced through the first and second chapter in the thesis;then,the EMIFA parallel transmission scheme,which is adopted in the existing baseband processing platform of the laboratory,is introduced in the 3rd chapter,and the board-level verification is carried out;finally,according to the specific project requirements,the design and improved SRIO interface are used as an inter-chip high-speed data transmission program in the baseband processing platform.The designed and improved PCI-E interface is used as an inter-board high-speed data transmission program in the baseband processing platform.The simulation and board level verification are carried on.The main work is as follows:1.Xilinx ISE14.7 software and its developed GTX high-speed data transceiver module are used to design and improve the logical layer of Serial Rapid IO(SRIO),triggering mode of SRIO,the amount of data triggered by each transmission and the corresponding SRIO interface driver in the DSP end.2.In order to realize the remote operation and monitoring of the experimental equipment through PC,Xilinx's latest Vivado software and K7 series board are also used to realize the transmission scheme design of the Peripheral Component Interconnect Express(PCI-E)interface in the LTE-Advanced capacity test system,which is through the deep research of the improved terahertz Medium Access Control(MAC)protocol and the protocol is implemented through Verilog HDL.PCI-E network card driver is developed and implemented in the Linux operating system3.In order to simulate and verify the transmission scheme design of the two interfaces,the professional simulation softwares are used in the thesis.The results show that the single-channel rate of SRIO can reach 2.11Gb/s,and it can support up to four channels.Thus,the multi-channel transmission speed of the SRIO interface in the project can reach 8.44 Gb/s;the single channel rate of the network card device based PCI-E interface can reach 2.76Gb/s,and PCI-E interface can support up to 16 channels,so the multi-channel transmission speed of the network card device based PCI-E interface in the project can reach 44.16Gb/s.Compared with the previous parallel interface of baseband platform,applications of SRIO and PCI-E greatly not only enhance the data transmission speed of baseband platform,which fully meet the requirements of data transmission rate in the current system,but also provide a reference of interface transmission design for the implementation of the future communication system.