Research On Modeling Technology For Millimeter-wave CMOS Devices

The rapid development of integrated circuit industry has greatly promoted the social progress.Due to low cost,fast speed,high integrity and low power consumption,CMOS technology has been widely used in integrated circuit design.In integrated circuit design,the accuracy of the transistor models directly effect the circuit simulation and application performance,therefore,an accurate transistor model is the key to the success of integrated circuit design.As the size of the devices keeps scaling down,the cutoff frequency keeps increasing,how to achieve accurate transistor models has been a great challenge.In this thesis,the nonlinear equivalent circuit model of CMOS transistors based on bulk silicon technology and SOI(silicon on insulator)technology are studied.Firstly,based on 90 nm bulk silicon technology,the small signal equivalent circuit model of MOSFET is established by considering the transistor intrinsic effects and some typical parasitic effects in high frequency.Then the accuracy of the model has been verified through S parameters.Based on the small signal equivalent circuit model,the nonlinear characteristics of gate capacitance are studied,and some nonlinear equations are established to represent the bias-dependent characteristics of the gate capacitance.Furthermore,the accuracy and complexity of several different DC models are compared and summarized.SOI technology has many advantages over bulk silicon CMOS processing.In particular higher integration densities,small parasitic capacitance,latch-up immunity,and anti-radiation features.Thus,based on 0.18 ?m SOI technology,the nonlinear equivalent circuit model is studied in this thesis.Considering the typical physical effects in SOI MOSFET,the small signal equivalent circuit model is established.Then nonlinear gate capacitance models are established to represent the bias-dependent characteristics of gate capacitance.The DC model is established according to the measured DC characterisitcs of SOI MOSFET.Finally,the nonlinear equivalent circuit model of SOI MOSFET is estabilished by combining the small signal model and the nonlinear models together.Above all,the main content of the thesis is as follows:1.The test structures are designed,and the on-wafer test system is established.Then the transistors are tested for validation purpose.In addition,the measured S parameter results are de-embedded using open-short method.2.Study on 90 nm bulk silicon technology MOSFET,including small signal equivalent circuit model,nonlinear gate capacitance model and DC model.3.Study on 0.18 ?m SOI MOSFET,including small signal equivalent circuit model,nonlinear gate capacitance model and DC model.