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Development Of Nanosecond Sub-Frame Super-High Speed Visual Imaging Device

Posted on:2018-04-07Degree:MasterType:Thesis
Country:ChinaCandidate:H ZhanFull Text:PDF
GTID:2348330566451023Subject:Mechanical and electrical engineering
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High-speed imaging technology can make the instantaneous changing process of the moving objects recorded by image.This technology is widely used in national defense,Scientific research,biomedicine and other fields.The speed and quality of image determine the performance of high-speed imaging systems.At present the world's image sensor maximum frame rate up to 1000 fps.The exposure interval of the image sensor is 1ms.It is necessary to improve the image acquisition frame rate and ensuring image quality to achieve accurate observation of high-speed physical phenomena within ms.Aiming at observating the physical phenomena of high-speed movement,the thesis designed and developed a high-speed imaging device based on frame-cross technology.The system improves the imaging speed of the system and maintains the original quality of the image sensor by the optical frame-cross technology.This system realizes the detection of kinematic information such as the speed and acceleration of the high-speed moving objects by adjusting the exposure interval of adjacent images.The main work and achievements are as follows:(1)Aiming at the problem that the overall performance of the imaging system is limited by the sensor chip,A dichotomous imaging path is designed to achieve uniform imaging of different chips.The adjustment mechanism is adopted to realize the calibration of the optical path to precision of 1um.A FPGA-based dual SCMOS high-speed imaging board is designed.The imaging device hardware system has been built and debugged.(2)The FPGA-based timing control firmware is developed according to the image data volume and data speed.The parameter configuration of two image sensors and the timing control of 10 ns are realized.The image display and parameter configuration of the imaging device are carried out by the host computer.It transfers images at high speed by Cameralink protocol containing CRC mechanism.In those method,this system realizes real-time acquisition and transmission display of high-speed images at rate of 4080 Mbps.(3)The thesis completes the calibration of the image sensor,depending on the optical path and the mechanical structure.This thesis analyzes the image distortion caused by electrical and optical factors.By using FPGA and hardware algorithms,those distortion are corrected.image filtering,flat field correction and other pre-processing operations are also achieved through the hardware.(4)The disc speed test is designed to verify the accuracy of the exposure interval between different sensors in the imaging system.The image correlation is improved from 0.915 to 0.995.The moving table tennis is used as a research object to carry out moving target detection and recognition.The thesis presents a method for detecting the speed of table tennis in high-speed sports and realizes the analysis of the movement state of high-speed moving objects.
Keywords/Search Tags:sub-frame technology, high-speed imaging, FPGA, noise suppression, moving target detection
PDF Full Text Request
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