Research And Design Of Multi-protocol Conversion System Based On FPGA

With the rapid development of computer network technolog(CNT),there are not only field-bus in industrial field and WIFI in our daily life.It is not limited to merely connections between human beings and objects or objects no matter from industry or life scene.Internet of everything has already become the trend of the world's development and connection methods are also co mplicated in accordance with the different forms and that is what we called transport protocol.In other words,to achieve Internet of everything is to integrate numerous transport protocols(protocol conversion).The protocols applied in different scenarios are naturally different.It is necessary to design a data terminal configured flexibly to suit any multi-protocol scenario.The purpose of this paper is to design a multi-protocol conversion architecture based on FPGA so that it can flexibly adapt to any multi-protocol conversion scenario and integrate multi-protocol into one.Nowadays,there is no uniform standard for protocol conversion in the market,and take function realization as the goal.Protocol conversion is mostly based on embedded system.The protocol conversion protocol is single and each scenario must be specially designed.Moreover,the function of protocol conversion depends on software with slow speed.This paper tends to design a multi-protocol conversion architecture based on the high frequency and configuration of FPGA.Because this is a new and groundbreaking multi-protocol architecture.The creative works have been carried out as following.1)The error modeling and evaluation of the synchronous detector is shown.For the error evaluation index based on sensitivity analysis,the shortcomings of local sensitivity index and global sensitivity index are analyzed.Besides,the construction of comprehensive global sensitivity index and its fluctuation index is completed.According to the theory of multi-body system,the geometric error model of synchronous detector is established,and the key error of terminal error is defined by evaluation index.Firstly,the most widely used ZigBee Ge?WIFI? RS485?NB-IOTted? Ethernet? infrared ray and Bluetooth protocols are investigated extensively and the network form and transmission principle of each protocol are analyzed,especially the data frame format of each protocol.In this framework,the protocol frame can be configured in priority in the architecture.The software processing can be solidified to improve the transmission efficiency.Second,this paper proposes a multi-protocol integration architecture based on FPGA for the first time and the purpose lies in not merely transition between multi-procotol.The most important is to put forward a configurable multi-protocol architecture.The data conversion depends on the hardware completely and the multi-protocol conversion matrix depended on design can flexibly realize the multi-protocol conversion.Third,this paper creatively puts forward the priority FIFO,which makes the procotol data frame of the same kind have a certain priority in the buffer stage so that the high priority data can be processed as fast as possible.Fourth,in the final stage of data output,this paper adopts the weight load output and launches polling probability assignment on different protocol data in accordance with the priority of different protocol data,so that the high-priority data will be outputted in precedence.Finally,this paper achieve the functions of the framework with the application of VERILOG language in spartan-3,synthesize codes and complete the implementation of the RTL level.The software simulation of the architecture is carried out by using six protocol data packets.