Study On Fabrication, Characterization And Properties For Several Kinds Of Microelectronic Materials

Driven by the need for faster and smaller electronic devices with higher performance, microelectronic industry is developing aggressively. The feature size of integrated circuit (IC) and the size of printed circuit board (PCB) used for interconnection of different circuits are scaling down, which makes a lot of traditional microelectronic materials and technologies face large challenges. Therefore, study and application of new materials and technologies are necessary to ensure the sustainable development of microelectronic industry.Conventional gate dielectric of thermal SiO2 has reached the physical thickness limitation in the technology of complementary metal-oxide-semiconductor (CMOS). High dielectric constant (high-k) materials have been investigated intensively as a replacement for SiO2. Hafnium oxide (HfO2) has been attracted greatest attention among these high-k materials. However, HfO2 suffers from low crystallization temperature, mobility degradation, fixed charge and threshold voltage instability, etc., and the properties of HfO2 can be improved by adding different elements such as N, Si, Al, Ti, Zr, etc. Atomic layer deposition (ALD) and chemical vapor deposition (CVD), which are compatible with semiconductor industry, have become the most important techniques for high-k materials deposition. The carbon contaminations of metal organic precursors limit the further improvement of ALD and CVD films. In this thesis, Hf-Al-O and Hf-Zr-O mixed-metal oxides have been deposited by ALD and CVD techniques using carbon-free anhydrous nitrates precursors. The growth behavior, film composition and structure, thermal stability and electrical properties of the mixed-metal oxides have been studied systemically.Flash memories are the dominant devices in current non-volatile memory (NVM) market. However, with the further development of microelectronic devices, flash memories, which are based on the traditional floating gate structure, have encountered serious challenge in scaling. As a result, novel charge trapping memories have been one of the candidates for next generation of flash memories. Conventional charge trapping memories, which are based on SONOS (silicon-oxide-nitride-oxide-silicon) structure, have the disadvantage of poor retention characteristics. Therefore, many semiconductor companies and institutes focus on novel charge trapping memories with improved structure to obtain faster programming/erasing speed, lower operation voltage and better retention property. In this thesis, we report the properties of a MANAS (Metal/Al2O3/SiNx/Al2O3/Si) charge trapping memory cell structure, in which both the tunnel and blocking layers are made of the high-quality Al2O3 deposited by the molecular atomic deposition (MAD) technique.Recently, high density interconnection (HDI) and miniaturization have been major trends for PCB, in which via-holes are used to connect conductive layers. Build-up process has been a key technology for the fabrication of PCBs, and is toward more layers with smaller through-hole and higher aspect ratio of depth-diameter. Both the interlayer connection and the filling of via-holes are accomplished by copper electroplating, with increasing demands on performance. Therefore, understanding the microstructure of electroplated copper has drawn great attention, because of its tremendous impact on the reliability of PCBs. Furthermore, electroplated copper is demonstrated to undergo "self-annealing", which has a substantial effect on the microstructure, texture and the associated physical properties of electroplated copper. In this thesis, the microstructure of electroplated copper used in via-holes of PCBs was studied by several kinds of characterization methods. Self-annealing process was also investigated and the texture change during this process was discussed. The main achievements made in this thesis are summarized as follows:1. Volatile anhydrous hafnium nitrate (Hf(NO3)4) and mixed-metal nitrate of Hf/Zr (HfxZr1-x(NO3)4) precursors were synthesized successfully. Hf-Al-O films were deposited by ALD using Hf(NO3)4 and Al(CH3)3 (trimethyl aluminum, TMA) as metal precursors and H2O as oxidant. The film composition as well as electrical properties such as effective oxide thickness (EOT), flatband voltage, hysteresis and leakage current were changed linearly according to the different ratio of hafnia and alumina ALD cycles. The Hf/Zr composite nitrate can be taken as a solid solution of the individual Hf and Zr nitrates, and the Hf/Zr molar ratio in this precursor is 1.72:1. Hf-Zr-O films were deposited from Hf/Zr composite nitrate as a single-source precursor by ALD and CVD techniques, respectively. The Hf/Zr ratio in ALD deposited Hf-Zr-O films is 1:4, which is quite different from that in the precursor. Whereas, the Hf/Zr ratio in CVD deposited Hf-Zr-O films is nicely consistent with that in the precursor. It is supposed that different results of the films deposited from the same precursor by different techniques may be due to the different deposition principles and requirements of precursors for different techniques. Hf-Zr-O films deposited from by CVD indicate precise composition transfer from the precursor to deposited films. Therefore, Hf/Zr composite nitrate is one of the promising candidate precursors to deposit dual-metal oxide.2. MANAS charge trapping memory cell was fabricated, in which both the tunnel and blocking layers were made of the nearly trap-less Al2O3 deposited by MAD technique (MAD_Al2O3). MAD_Al2O3 forms a good interface on Si with low density of interface traps, and has relatively high conduction band offset (3.9eV) and low valence band offset (2.1eV) on Si. MAD_Al2O3 also proves to have low density of bulk traps, which is evidenced by the little temperature dependence of J-V curves and their fit to the FN (Fowler-Nordheim) tunneling model, as well as hardly any noticeable SILC (stress induced leakage current). Due to these outstanding performances of MAD_Al2O3 tunnel and blocking layers, MANAS charge trapping memory cell achieves programming/erasing (P/E) using FN tunneling mechanism. A 6V erase window and a 5.6V programming window are obtained with a-12V/10ms erase pulse and a+12V/100μs programming pulse, respectively. With such a MANAS cell structure, we are able to reduce the operating voltages down to±11V to achieve P/E windows that would require more than±17V for state- of-the-art SONOS-type of NVM cells. The endurance characteristics of MANAS transistor cells show that the memory window remains wide open after 105 P/E cycles. The retention characteristics between 1 and 104 sec at room temperature up to 250℃indicate low decay rates, which are -0.24V/dec for programming after +10V/100μs pulse and +0.11V/dec for erasing after -10V/10ms pulse. Furthermore, a close-up view of the retention behavior between 10-4 and 1 sec after P/E operations shows very little initial charge loss.3. Microstructure of electroplated copper in via-holes was characterized by EBSD (electron backscatter diffraction) and FIB (focused ion beam) techniques. Different behaviors of copper electroplated using different additives (labeled as A, B and C) after solder float test were compared as follows. Thin cracks appear at the corner of the hole for electroplated copper using additives A and B. The cracks propagate and end inside the copper, showing good resistance to thermal cycling. However, for electroplated copper using additive C, thick cracks propagate across the whole copper layer, indicating poor resistance to thermal cycling. Structure and texture change of electroplated copper during self-annealing process were tracked and characterized by X-ray diffraction (XRD) and EBSD techniques. Texture transformation from<110> to<311> was observed and could be illustrated as follows:The proprietary additives incorporated in the electroplating solution, the electroplating conditions and the substrate with relatively strong<110> orientation, led to the formation of a deposit in which the majority of grains were<110> oriented in the as-deposited copper foils; after "recovery" stage, grain growth occurred and<110> orientation firstly underwent a first order twinning to<411>, followed by a tilt of about 6°to reach <311>, driven by a reduction in surface energy. As the basis and core of information industry, IC has become the focus of international competition and the measurement of a country's comprehensive national strength. National science and technology major project "ultra large scale integrated circuit manufacturing equipment and complete sets of process" has been launched in 2009. Currently, materials and technology with intellectual property rights are seriously scarce. Our work focuses on fabrication, characterization and properties for several kinds of microelectronic materials, which explores new materials in the next generation of IC microelectronics applications, and promotes the development of IC industry in China...