Design Of High Sensitivity Balanced Receiver

The high sensitivity balanced receiver is the key part of Brillouin Optical Time Domain Analysis sensing system.The project is divided into two aspects:hardware design and software design.The hardware design includes the planning of each functional module,the selection of key components and the calculation of circuit parameters.The software design includes the driver program of ADC control,clock control,PWM pulse output and temperature control.This paper focuses on the hardware circuit design of the high sensitivity balanced receiver scheme.The design of power-supply module,control module and amplifier module are analyzed and demonstrated in detail.The performance of each module will directly affect the precision and stability of the whole system.The power-supply module includes the power supply ofregular voltage chip and the high-voltage generating circuit which provides the bias voltage for the avalanche photodiode.The control module includes a CPU and its pheral circuit,the temperature control circuit of fiber grating and avalanche photodiode,and the current monitoring circuit for high-voltage generation circuit.In the temperature control circuit,the H-bridge driving circuit and the PID algorithm are used to realize the specific control logic.The amplifier module realizes the amplification function of weak photocurrent signal after photoelectric converter.It uses the three stage amplification design to avoid the influence of self-excited noise through noise suppression.In this paper,the basic theory to design the high sensitivity balanced receiver is introduced and then the schematic and PCB layout of each module are designed in detail under the guidance of theory principle.The circuits including temperature control circuit and high voltage generation areverified experimentally.