Neural Low Noise Amplifier For Hippocampal Prosthesis Biochip

At present,brain research is a hot topic in contemporary scientific research areas.More and more government organizations and scientists are calling for strengthening brain research.The research in human brain science has been accelerating in China.After the Chinese Academy of Sciences announced the implementation of the Center for Excellence in Innovation Plan,and the"Thirteen Five" Plan identified a number of major scientific and technological projects,brain science and Human brain research is among them.With the appearance of nano-process biochip based on Application Specific Integrated Circuit(ASIC)technology,it's possible to build a biological microsystem that focuses on miniaturization,intelligent,and high precision.This study demonstrates a low NEF neural amplifier in CMOS 40nm technology that uses a bulk-compensated circuit to reduce the power consumption and the sensitivity of process variation significantly,based on the application of microelectronic technology in the hippocampal biochip.The main work and innovation of this study includes:1.Base on operating principle of Neural LNA,the key points in neural LNA chip designs are proposed,including low power design methods,low noise design methods and some design methods to reduce process variations.The neural LNA performance is proposed,and then the system structure of Neural LNA is presented.2.The function and performance of each parts of neural LNA are proposed.Based on the realization of neural LNA,the detailed design of each module circuit is proposed.Finally,we analyze and conclude the performance of overall circuit design.3.The substrate coupling effect and design rules to minimize mismatch in the layout are analyzed,and the layout of the chip is completed.Based on post simulation results,we optimize the neural LNA and then tape it out in SMIC.4.The neural amplifier is presented in this study,has used sub-threshold CMOS design method,pseudo-resistor technology and bulk-compensated circuit design.So we obtain a neural amplifier with the power consumption of 3.3 ?W and 3.95 ?Vrms integrated in interested bandwidth between 100Hz and 11.4kHz(the neural signal frequency between a few hundreds and a few thousands),leading to an NEF of 3.45.