Design Of High Efficiency Integrated Class E Power Amplifier For Wireless Local Area Networks

With the rapid development of modern wireless communication technology,radio frequency electronic circuits are developing towards low cost,low power consumption,high efficiency and integration.As the most important front-end RF integrated circuit module,the power consumption of the RF power amplifier determines the power level of the transmitter,and the RF power amplifier design is reasonable or not will determine the integration of transmitter.Therefore the design of a power amplifier circuit with high efficiency and low power consumption has the great significance.This paper first briefly introduces the background and significance of the RF power amplifier and related knowledge of WLAN,and then analyzes the research trends of RF E power amplifier at home and abroad,based on analysis of RF power amplifier theory,two kinds of WLAN,WiFi and other short distance wireless communication in the class E power amplifier is presented for,the specific work is as follows:(1)This paper presents a high efficiency and high output power RF class E power amplifier for WLAN.A high efficiency monolithic CMOS class E power amplifier is implemented using a differential cascode and a self biasing technique for the two stage structure,which shows significant improvement in RF performance.The differential cascode circuit with current mirror is used to improve the power gain and improve the drive capability of the switch stage.In the switching stage,the self bias technique is used to insert a series LC network into the drain node of the switching transistor.Under the 1.2V supply voltage and 2.4GHz operating frequency,the overall class E power amplifier to obtain the maximum output power of 24.3dBm,power added efficiency of 67.4%,power gain of 34.2dB,layout area of 0.67 × 0.74mm2.(2)This paper presents a high efficiency,low power consumption,low voltage RF class E power amplifier for short distance wireless communication technology.The negative capacitance inserted in the output node of the drive stage by adjusting the waveform of the output voltage reduces the parasitic capacitance,and the driver can improve the power gain and improve the drive capability of the power stage.The power stage uses a self biased technique and the insertion of a series of LC networks into the drain transistors of the switching transistor greatly improves the efficiency.The monolithic class E power amplifier transmit the maximum output power of 23.5dBm,power added efficiency is 65.9%,the input return loss(S11)of-17.3dB,the output return loss(S22)-15.8dB,the layout area is 0.65 × 0.63mm.Two kinds of class E power amplifier is presented in this paper are the use of TSMC 0.18 ?m CMOS process,using advanced design system(ADS)design and simulation.The performance of the two kinds of RF E power amplifiers is shown to be superior to that in recent years,especially in terms of efficiency,voltage,and layout area.