Optimizing And Analyzing Of The Memory Access Of Many-core Processor

For a long time,the performance of the processor and main memory growth respectively with different speed,which reached a certain degree that the slow development of main memory would stop the improvement of the system performance from the rapid growth of the processor,which,in turn,produce the problem of The Memory Wall.The Memory Wall seriously restricts the performance improvement of many-core processor system.However,we have found a new technology to solve this problem,that is optical interconnection.Because of the high bandwidth,low latency,flexible spatial distribution and suitable for long distance transmission,optical interconnection become the best choice to solve the problem of memory wall.In this paper,we bulid a system of 64-cores processor based on Gem5 simulator,and conduct some exeperiments of memory access with the simulation of on-chip optical interconnection and off-chip optical interconnection.We found that the on-chip Laet-Level caches occupy most of the chip area and aslo produce lots of power consumption.So,under the condition of optical interconnection,the efficiency of memory access is highly improved.We conclude that the system performance would stay as before at least if we put the Last-Level Cache off chip while the off-chip optical interconnection is realized,in this way,we decrease the chip area.This paper introduced a new optical interconnection network which is called the two-way segmented optical ring.This network can make the channel segment work in parallel and being unidirectional.So we save a large number of waveguides and other optical components which improve the accessing speed and also ruduce the chip power consumption and decrease the chip area.