Research On SNR Estimation Algorithms For Coded Spread Spectrum Systems

The signal-to-noise ratio(SNR),used to characterize channels,is an important index of communication systems,especially in the design of the receiver for coding spread spectrum communication systems,since the accurate SNR is instructive to set the despreading threshold and decoding.In this dissertation,the SNR estimation algorithms of spread spectrum receiver are researched,which are presented in three different stages,and implemented on FPGA hardware platform.The main research contents are as follows:(1)The basic concepts and principles are studied,including the SNR,spread spectrum,and LDPC coding and decoding.And the time and frequency-domain estimation formulas of the SNR are analyzed.(2)The SNR estimation algorithm before pseudo-code synchronization is studied.Then two algorithms,such as second-order fourth-order moment estimation and high-order moment estimation of constant-mode signal,are analyzed and compared.The simulation results show that the former has higher accuracy and simpler realization at high SNR regions,while the latter is more accurate but complicated when the SNR is low.The FPGA implementation scheme of the second-order moment fourth-order moment estimation algorithm is proposed and completed on the FPGA circuit board,and the design diagrams and implementation results of each module are given in details.(3)The SNR estimation algorithm after pseudo-code synchronization is discussed.Aiming at the problem that the maximum likelihood(ML)and the post detection of signal quality(PDSQ)estimation algorithm are inaccurate at low or high SNR,the algorithm of the split-symbol moments estimation for direct-squence spread spectrum systems(DS-SSME)is proposed,which makes use of the length information of each chip length in each despreading symbol,to obtain more accurate SNR estimation values.The simulation results show that the proposed DS-SSME algorithm has the best estimation performance and is most suitable for the spread spectrum system,and the results of the complexity analyses also show that the proposed scheme has the lowest complexity,compared with the ML and PDSQ as well as other traditional SSME algorithms.The FPGA implementation scheme of the proposed DS-SSME is presented,and the design diagram and implementation results of each module are given in details.(4)The LDPC-decoding-assistant SNR estimation algorithm is studied,and an improved LDPC-decoding-assistant SNR estimation algorithm is proposed,to solve the problems,such as inaccurate estimation in the low SNR region and sensitivity to the initial value.In comparison with the traditional decoding SNR estimation algorithms,the SNR estimation,obtained by the pseudo code synchronization,is regarded as the initial value in the proposed scheme.The theoretical and simulation results show that the proposed scheme can obtain very stable estimation performance and precision in the theoretical range.