Research On The Effect Of Power Distribution Network(PDN) On High Speed Parallel Link

With the development of ultra-large-scale integrated circuit technology,the chip channel size is inevitably further scaled down,and the core voltage of digital circuit products will continue to decrease.And the current will be bigger and bigger,which makes power integrity issues increasingly become a factor in restraining product performance.In addition,signal integrity problems such as crosstalk and reflection are becoming more and more serious as signal rates continue to increase.In the high-speed circuit design process,how to estimate the impact of power integrity and signal integrity on the system has become a factor in determining product performance.At present,the actual product design process used to estimate the high-speed link performance methods are mainly following two.The first is the use of SPICE model,with adding pseudo-random code to excitation side,which is relatively accurate but the simulation time is too long to meet the demand of manufacturers of rapid development of new products.The second is not to consider the power supply noise,only the noise in the channel for analysis,through the fast time domain calculation method to get the worst eye diagram.This method does not take into account the power supply noise,which makes the results obtained more optimistic than the real situation.So it is not able to guide the design.This paper presents a method considering both the power supply noise and the noise in the channel to obtain the bit error rate(BER)eye diagram of full link.This method first calculates the probability distribution of the noise in the channel by the Double Edge Responses(DER)method.And then using the statistical domain method to obtain the probability distribution of noise that power supply noise coupled to the data line.Finally,the two-part probability distribution is convoluted to obtain the probability distribution and the bit error rate of the full link.The speed of the method in calculating the channel part is much higher than that of the traditional SPICE simulation method.Besides,the method taking into account the common influence of the power supply noise and the channel.The bit error rate is more comprehensive than the worst eye diagram,and the engineer can determine whether the designed product meets the requirements with the help of the BER diagram.The method proposed in this paper of getting the BER eye diagram has great application prospect.The software developed according to this method can be used as a tool in the actual productdesign process to evaluate the design,and has a strong practical value.