Design And Implementation Of High Definition Video Encoder Based On DM6467

As an important load information for UAV platforms,UAV reconnaissance image plays an important role in military reconnaissance,effect assessment,flight control,equipment monitoring,situation assessment,etc.With the continuous development of sensor technology,and electronic and communication technology,the demand for UAV image compression has shown new changes.Firstly,the category of image loading has been constantly enriched,visible video,infrared video and digital photograph have been used widely.Secondly,high-definition video has been applied gradually.The original data volume has doubled.Finally,the application of UAV images is increasing,including control for takeoff and landing,integration of reconnaissance and attack,etc.These applications have harsh requirements on low-delay encoding and anti-error performance.The traditional image encoder based on DSP processor has not able to meet the above needs.DM6467 processor uses So C framework,integrates high-performance ARM?DSP and HDVICP coprocessor,for image compression to achieve macro block H.264 video encoding prediction,transformation,coding and other functions via hardware,resulting in ten times of effectiveness against traditional DSP processors in the case of constant power consumption.High-definition video encoder based on DM6467 is able to meet the needs of UAV image compression in the processing performance,compression efficiency,low delay,anti-error,etc.This thesis introduces design and project realization related to HD encoder in the following aspects.(1)Learn and understand H.264 video coding standards to lay a solid theoretical foundation for the development of hardware and software.Firstly,it analyzes basic principle of video encoding.Secondly,it describes treatment process and all key technologies of H.264 coding.(2)Hardware design of high-definition video encoder.Aiming at the actual demand of UAV image transmission,the design scheme based on FPGA + DM6467.Firstly,the design of the acquisition circuit is carried out.Secondly,image preprocessing is conducted by using abundant resources and high flexibility of FPGA.Finally,the internal structure of core component DM6467 for image compression and other resources related to HDVICP are mainly researched,and design proposal of DDR2,NAND Flash and other external circuit are given.(3)Software design of high-definition video encoder.Firstly,FPGA software output the data meeting DM6467 video interface requirements through the image preprocessing module and RAW format framing transmission mode,and achieve FPGA software universal design through parameter configuration.Secondly,DM6467 software design.Realize control of the peripherals and data input and output through parameter control,video capture,data transmission,interrupt handling and other modules in ARM.Control 7 coprocessors of HDVICP0 in parallel mode in DSP to achieve efficient H.264 encoding.Realize low latency compression by using intra refreshment algorithm.Finally,satisfy the loading reliability requirements in complex environments by adopting program loading and reinforcement technology.(4)Test related to main functions and performance indicators of video encoder.Test result shows that processing performance,compression efficiency,coding and decoding delay,anti-error performance and other key indicators of high-definition video encoder meet the system requirements.