Design And Implementation Of Spaceborne Reconnaissance And Processing Platform

In order to compete for the strategic high ground in the modern information warfare,the exploitation of outer space has become the world's military development trend.As a major means of space reconnaissance,satellite electronic reconnaissance has caused the attention of the world and has been vigorously developing.Therefore,it is of important practical significance to study the advanced spaceborne electronic reconnaissance,according to the demand with the progress of times.Based on a spaceborne passive reconnaissance and positioning system,this paper studies and designs the spaceborne reconnaissance processing platform.The system scheme is intended to use the two-dimensional phase interferometer principle to locate the radiation source,and apply the digital channelization technology to deal with the high-speed reconnaissance signal.The hardware circuit adopts the common structure(ADC + FPGA + DSP).Several high-precision ADCs are used to perform analog-to-digital conversion(A / D)for the multi-channel IF signal from receiver output.The high-capacity FPGA is used to perform front-end processing for the converted signal.And,the high-speed multi-core DSP performs complex algorithm tasks,such as positioning and analysis.This paper,focusing on the reconnaissance processing platform,mainly carries out the following work:The key technologies of digital receiver are studied,such as digital channelization technology,adaptive threshold processing,and radar signal search strategy.Digital channelization technology transforms broadband digital signal into multiple baseband signals,which are independent in frequency domain.This technology reduces the data rate greatly.After channelization,multiple baseband signals can be processed in parallel.In this paper,the performance of this technology is verified by software simulation,and the shortcomings and solutions of the technology are analyzed.According to the specific requirements of the actual project,a hardware design of digital receiver of spaceborne reconnaissance signal processing is proposed.The digital channelization receiver,based on FPGA & DSP architecture with EV10AQ190 and XC7VX690T-1FFG1930 I chip as the core,uses band-pass sampling method to achieve a real-time acquisition of broadband signals,The ADC SPI serial interface,FPGA I / O and configuration and other functions are completed.The power supply network and power chip technical indicators are counted and analyzed,and a reasonable and effective power circuit filter design is carried out.The overall flow of reconnaissance signal processing is given,and the communication interface modules and the transmission strategy of PDW and IQ between are designed.The communication interface modules include: the ISERDES2 interface for data acquisition,the SPI digital control of ADC and clock chip,the telemetry or remote control of the receiver and the host computer,and the EMIF bus transmission.Based on FPGA,the reconnaissance signal preprocessing design is carried out,and the function of digital channel,radar parameter extraction(such as carrier frequency F,phase difference ??,pulse width PW,time TOA,pulse PA,etc.)are implemented.An indoor test platform is built to perform testing.The test results show that the FPGA software design of the platform basically meets the design requirements.In the debugging process,the corresponding solutions are given for the problems such as the phase difference error between multiple ADCs and the channel blindness.