Study On The Application Of The Signal Processing On Fractional Times

Interpolation algorithm is widely used in communication systems,and it has been a problem that people place an emphasis on how to use interpolation to rate the sampled signals to maintain the rate without distortion. The study of interpolation algorithm is very significant for the stable and efficient signal transmission.In this paper the fractional interpolation algorithm mainly applies to rate conversion of multi-rate signal processing and signal recovery in the bit synchronization system. At the very beginning, this paper analyzes shortage in arbitrary rate conversion of traditional filter such as the necessity of multi-level decomposition and its high order complicated structure from the respect of multi-rate signal processing technology. And it finds that the fractional interpolation algorithm could overcome problems mentioned above. This paper not only places an emphasis on study of the fractional interpolation algorithm by comparing the advantages and disadvantages of algorithms which has different frequency responses, but also makes a research of structure of Farrow filter which could achieve arbitrary rate conversion.This paper first introduces the fundamentals of interpolation algorithm in bit synchronization, then illustrates the Early-Late-Gate algorithm, the maximum average power estimation method and Gardner algorithm of timing error detection algorithm respectively. Moreover, it selects Gardner algorithm which has higher estimation accuracy as the bit synchronization module, aiming at the insufficiency of the existing algorithms, this paper designs one kind of interpolation algorithm which makes timing error achieve the minimum mean square error and lists the derivation process of the formula, in order to analyse the factors influencing the performance of the algorithm.At the end of this paper, a mass of simulation testify different interpolation algorithms compared with the mean square error of each algorithm under various conditions. It finds that MMSE interpolation algorithm has a better feature to prevent timing jitter. In order to verify the accuracy of the study, it uses FPGA as a hardware implementation.