Research And Implement Of The Dispersion Compensation Algorithm In Optical Fiber Communication System

With the arrival of massive information, the need of high capacity transmission is more and more urgent. As a high capacity transmission and long distance key technology, coherent fiber communication technology has been in a high speed development. But chromatic dispersion, as an inherent attribute, is the problem that hinder the development of fiber communication system. So, how to compensate the dispersion is the key to use coherent fiber communication widely.For the study of coherent optical fiber communication system, this paper illustrates the dispersion compensation algorithm in coherent optical fiber communication, and then the implement of the dispersion compensation algorithm in FPGA development board.(1) Based on researching the principles and some basic knowledge,this paper investigates the dispersion compensation algorithm and compares the advantages and disadvantages between the time-domain algorithm with the frequency-domain algorithm. And then the overlapping frequency-domain algorithm is chosen to implement the dispersion compensation in software simulation system and hardware experimental system.(2) A 112Gbit/s PMD-QPSK coherent optical communication system is set up using digital signal processing and DCF fiber respectively. The results show that the properties have slight difference but using digital signal processing has the lower cost.(3) Based on Xilinx ISE development software and Modelsim simulation software, this paper implements the overlap and save dispersion compensation algorithm in Virtex-5 development board using Verilog programming language. And then this paper simulates the function of the dispersion compensation algorithm using Modelsim simulation software and compares the feasibility of the dispersion compensation algorithm with the FPGA hardware experiment platform The results show that the transmission distance could be much longer than 500 kilometers with the BER below -3dB-the FEC limit. The results of the FPGA hardware experiment are almost the same as the simulation system, which means the performance of the dispersion compensation algorithm is good enough for the system requirements.